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HT9480 Datasheet(PDF) 7 Page - Holtek Semiconductor Inc |
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HT9480 Datasheet(HTML) 7 Page - Holtek Semiconductor Inc |
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7 / 47 page ![]() HT9480 Rev. 1.20 7 July 31, 2002 Program memory - ROM The program memory (ROM) is used to store the pro- gram instructions that are to be executed. It consists of data, table(s), and interrupt entries, and is organized into 8192 ´16 bits, which are addressed by the PC and ta- ble pointer. Certain locations in the ROM are reserved for specific usage: · Location 0000H Location 0000H is reserved for program initialization. The program always begins execution at this location each time the chip is reset. · Location 0004H Location 0004H is reserved for the data ready inter- rupt and battery fail interrupt service programs. If an interrupt results from a pager decoder interrupt re- quest or from a battery fail interrupt request, and the interrupt is enabled, and the stack is not full, the pro- gram begins execution at location 0004H. The occur- rence of a data ready interrupt or a battery fail interrupt is detected by checking the battery fail interrupt bit (1EH-bit 4, BF flag) and the data ready interrupt bit (1EH-bit 7, DR flag). The interrupt should be carefully processed if both interrupt bits are active. · Location 0008H Location 0008H is reserved for the programmable timer interrupt service program. If an interrupt results from a programmable timer interrupt request (its source is from 256Hz divided by N, where the value of N ranges from 1 to 256.), and the interrupt is enabled, and the stack is not full, the program begins execution at location 0008H. · Location 000CH Location 000CH is reserved for the timer/event counter interrupt service program. If a timer interrupt results from a timer/event counter overflow, and the interrupt is en- abled, and the stack is not full, the program begins exe- cution at location 000CH. · Look-up tables XX00H~XXFFH The ROM is composed of 32 groups (each group con- tains 256 continuous words) which can be used as look up tables. The instructions ²TABRDC [m]² (the current table) and ²TABRDL [m]² (the last table) trans- fer the contents of the low-order byte to the specified data memory, and the contents of the high-order byte to TBLH (Table High-order Byte Register) (08H). Only the destination of the low-order byte in the table is well-defined, the other bits of the table word are all transferred to the low portion of TBLH. TBLH is read only while the table pointer (TBLP) is a read- able/writable register (07H) used to indicate the table location. Before accessing the table, the location should be placed in TBLP. All of the table related in- structions require 2 cycles to complete the operation. This feature is efficient only for the movement of the blocks, which may function as look-up tables or as a normal program memory depending upon the require- ments. Stack register - STACK The stack register is a special memory port used to save the contents of the PC. It is divided into 8 levels. The stack register is neither part of the data nor part of the program, and is neither readable nor writable. The acti- vated level of the stack register is indexed by the stack pointer (SP), and is neither readable nor writable. At the commencement of a subroutine call or an interrupt ac- knowledge, the contents of the PC is pushed onto the stack. At the end of the subroutine or the interrupt rou- tine, as signaled by a return instruction (RET or RETI), the content s of the PC is restored to its previous value from the stack. After a chip reset, the SP will point to the top of the stack. 0 0 0 H 0 0 4 H 0 0 8 H D e v i c e i n i t i a l i z a t i o n p r o g r a m D a t a r e a d y i n t e r r u p t & b a t t e r y f a i l i n t e r r u p t s u b r o u t i n e T i m e r / e v e n t c o u n t e r i n t e r r u p t s u b r o u t i n e P r o g r a m R O M 1 6 b i t s 0 1 0 H 1 . . . H P r o g r a m m a b l e t i m e r i n t e r r u p t s u b r o u t i n e 0 0 C H Program memory Instruction(s) Table Location *12 *11 *10 *9 *8 *7 *6 *5 *4 *3 *2 *1 *0 TABRDC [m] P12 P11 P10 P9 P8 @7 @6 @5 @4 @3 @2 @1 @0 TABRDL [m] 1 1111 @7 @6 @5 @4 @3 @2 @1 @0 Note: *12~*0: Table location bits P12~P8: Current program counter bits @7~@0: Table pointer bits |
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