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HT9480 Datasheet(PDF) 21 Page - Holtek Semiconductor Inc |
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HT9480 Datasheet(HTML) 21 Page - Holtek Semiconductor Inc |
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21 / 47 page ![]() HT9480 Rev. 1.20 21 July 31, 2002 The function bits (ON, RES) and indication bits (CT, STB, BF,OR,BL and DR) are all used to control the status of the decoder which is operated through the pager control address as described in the following table. Symbol Bit R/W Description ON 0 R/W On/Off control bit This bit selects the ON or STANDBY state of the decoder. 0: ON state 1: STANDBY state RES 1 R/W Reset output for the decoder core The MCU has to set the RES bit low and then high after the pager controller is turned on. CT 2R Call termination indication bit This bit decides the call termination status, when a valid code-word is received 0: End of code-word receive 1: Receiving message code-word STB 3 R Standby indication bit When the value of the ON bit is 1, the system goes into the STANDBY state. The STANDBY state allows the MCU to execute the configuration RAM setting. BF 4R Battery fail indication bit Once the decoder detects that the battery fail interrupt is low, the BF bit will be low but unlatched. OR 5R Out-of-range indication bit Whenever the decoder detects an out-of-range condition, this bit is cleared low after end of the programmed out-of-range hold of time that is selected by the configuration registers (SPF06 and SPF07). The out-of-range indication may be tested for an out-of-range condition whenever the interface enable of the decoder is active; other- wise the OR is normally high. The out-of-range indication is set high by detection of a valid data transmission or by switching the decoder to be in the STANDBY state. BL 6 R/W Battery low indication bit The battery low indication is periodically tested for a battery low condition. If the decoder encounters a battery low condition the battery low indication bit is cleared low. At this time, the MCU should set the BL bit high. DR 7 R/W Data ready interrupt indication bit When a valid call is detected, data starts transfer. The DR bit becomes low when the se- rial data is changed to parallel data (1FH). After reading the parallel data, the MCU soft- ware has to set the DR bit high. · Pager data address The pager data address (1FH) are the parallel data lines for decoder data transfer. |
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