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ADAQ4216BBCZ Datasheet(PDF) 51 Page - Analog Devices

Part # ADAQ4216BBCZ
Description  16-Bit, 2MSPS, μModule Data-Acquisition Solution
PDF  61 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADAQ4216BBCZ Datasheet(HTML) 51 Page - Analog Devices

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Data Sheet
ADAQ4216
REGISTERS
analog.com
Rev. 0 | 51 of 61
The ADAQ4216 has programmable user registers that are used to configure the device. These registers can be accessed while the ADAQ4216
is in register configuration mode. Table 16 shows the complete list of the ADAQ4216 user registers and bit fields in the registers. The Register
Details section contains details about the functions of each of the bit fields. The access mode specifies whether the register is comprised only
of read-only bits (R) or a mix of read-only and read/write bits (R/W). Read-only bits cannot be overwritten by an SPI write transaction, but
read/write bits can.
Table 16. ADAQ4216 Register Summary
Reg
Name
Bits
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset
R/W
0x00
INTERFACE_CONFIG
_A
[7:0]
SW_RESET
RESERVED
ADDR_ASC
ENSION
SDO_EN
ABLE
RESERVED
SW_RES
ETX
0x10
R/W
0x01
INTERFACE_CONFIG
_B
[7:0]
SINGLE_INST
STALLING
RESERVED
SHORT_INST
RUCTION
RESERVED
0x00
R/W
0x02
DEVICE_CONFIG
[7:0]
RESERVED
OPERATING_MO
DES
0x00
R/W
0x03
CHIP_TYPE
[7:0]
RESERVED
CHIP_TYPE
0x07
R
0x04
PRODUCT_ID_L
[7:0]
PRODUCT_ID[7:0]
0x00
R
0x05
PRODUCT_ID_H
[7:0]
PRODUCT_ID[15:8]
0x20
R
0x06
CHIP_GRADE
[7:0]
GRADE
DEVICE_REVISION
0x00
R
0x0A
SCRATCH_PAD
[7:0]
SCRATCH_VALUE
0x00
R/W
0x0B
SPI_REVISION
[7:0]
SPI_TYPE
VERSION
0x81
R
0x0C
VENDOR_L
[7:0]
VID[7:0]
0x56
R
0x0D
VENDOR_H
[7:0]
VID[15:8]
0x04
R
0x0E
STREAM_MODE
[7:0]
LOOP_COUNT
0x00
R/W
0x11
INTERFACE_STATUS
_A
[7:0]
RESERVED
CLOCK_C
OUNT_ER
R
RESERVED
0x00
R/W
0x14
EXIT_CFG_MD
[7:0]
RESERVED
EXIT_CO
NFIG_MD
0x00
R/W
0x15
AVG
[7:0]
AVG_SYNC
RESERVED
AVG_VAL
0x00
R/W
0x16
RESERVED
[7:0]
RESERVED
0x00
R/W
0x17
OFFSET_LB
[7:0]
USER_OFFSET[7:0]
0x00
R/W
0x18
OFFSET_HB
[7:0]
USER_OFFSET[15:8]
0x00
R/W
0x19
UNUSED1_LB
[7:0]
UNUSED1[7:0]
0x00
R/W
0x1A
UNUSED1_MB
[7:0]
UNUSED1[15:8]
0x00
R/W
0x1B
UNUSED1_HB
[7:0]
UNUSED1[23:16]
0x00
R/W
0x1C
GAIN_LB
[7:0]
USER_GAIN[7:0]
0x00
R/W
0x1D
GAIN_HB
[7:0]
USER_GAIN[15:8]
0x80
R/W
0x1E
UNUSED2_LB
[7:0]
UNUSED2[7:0]
0x00
R/W
0x1F
UNUSED2_HB
[7:0]
UNUSED2[15:8]
0x80
R/W
0x20
MODES
[7:0]
LANE_MD
CLK_MD
DDR_MD
OUT_DATA_MD
0x00
R/W
0x21
OSCILLATOR
[7:0]
OSC_LIMIT
OSC_DIV
0x00
R/W
0x22
IO
[7:0]
RESERVED
IO2X
0x00
R/W
0x23
TEST_PAT_BYTE0
[7:0]
TEST_DATA_PAT[7:0]
0x0F
R/W
0x24
TEST_PAT_BYTE1
[7:0]
TEST_DATA_PAT[15:8]
0x0F
R/W
0x25
TEST_PAT_BYTE2
[7:0]
TEST_DATA_PAT[23:16]
0x5A
R/W
0x26
TEST_PAT_BYTE3
[7:0]
TEST_DATA_PAT[31:24]
0x5A
R/W
0x34
DIG_DIAG
[7:0]
POWERUP_CO
MPLETED
RESET_OC
CURRED
RESERVED
FUSE_CR
C_EN
0x40
R/W
0x35
DIG_ERR
[7:0]
RESERVED
FUSE_CR
C_ERR
0x00
R/W



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