AD6655 datasheet(31/84 Pages) AD

31 / 84 page

AD6655

Rev. 0 | Page 31 of 84

Single-Ended Input Configuration

A single-ended input can provide adequate performance in

cost-sensitive applications. In this configuration, SFDR and

distortion performance degrade due to the large input common-

mode swing. If the source impedances on each input are matched,

there should be little effect on SNR performance. Figure 51 shows

a typical single-ended input configuration.

2V p-p

49.9Ω

0.1µF

10µF

0.1µF

AVDD

1kΩ

AD6655

AVDD

VIN+

VIN–

Figure 51. Single-Ended Input Configuration

VOLTAGE REFERENCE

A stable and accurate voltage reference is built into the AD6655.

The input range can be adjusted by varying the reference voltage

applied to the AD6655, using either the internal reference or an

externally applied reference voltage. The input span of the ADC

tracks reference voltage changes linearly. The various reference

modes are summarized in the sections that follow. The Reference

Decoupling section describes the best practices PCB layout of

the reference.

Internal Reference Connection

A comparator within the AD6655 detects the potential at the

SENSE pin and configures the reference into four possible modes,

which are summarized in Table 15. If SENSE is grounded, the

reference amplifier switch is connected to the internal resistor

divider (see Figure 52), setting VREF to 1.0 V. Connecting the

SENSE pin to VREF switches the reference amplifier output to

the SENSE pin, completing the loop and providing a 0.5 V

reference output. If a resistor divider is connected externally

to the chip, as shown in Figure 53, the switch again sets to the

SENSE pin.

This puts the reference amplifier in a noninverting mode with

the VREF output defined as follows:

⎟

⎠

⎞

⎜

⎝

⎛ +

VREF

The input range of the ADC always equals twice the voltage at

the reference pin for either an internal or an external reference.

VREF

SENSE

0.5V

AD6655

SELECT

LOGIC

0.1µF

1.0µF

VIN–A/VIN–B

VIN+A/VIN+B

ADC

CORE

Figure 52. Internal Reference Configuration

0.5V

AD6655

SELECT

LOGIC

VIN–A/VIN–B

VIN+A/VIN+B

ADC

CORE

VREF

SENSE

0.1µF

1.0µF

Figure 53. Programmable Reference Configuration

Table 15. Reference Configuration Summary

Selected Mode

SENSE Voltage

Resulting VREF (V)

Resulting Differential

Span (V p-p)

External Reference

AVDD

N/A

2 × external reference

Internal Fixed Reference

VREF

0.5

1.0

Programmable Reference

0.2 V to VREF

⎟

⎠

⎞

⎜

⎝

⎛ +

(see Figure 53)

2 × VREF

Internal Fixed Reference

AGND to 0.2 V

1.0

2.0

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