TMP89FS60 datasheet(109/410 Pages) TOSHIBA

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Page 95

TMP89FS60

RA005

8.3

I/O Port Registers

8.3.1

Port P0 (P03 to P00)

Port P0 is a 4-bit input/output port that can be set to input or output for each bit individually, and it is also

used as the high-frequency oscillation connection pin and the low-frequency oscillation connection pin.

Port P0 contains a programmable pull-up resistor on the VDD side. This pull-up resistor can be used when

the port is used in the input mode.

Figure 8-2 Port P0 (P00, P01)

Table 8-3

Port P0

----

P03

P02

P01

P00

Secondary

function

----

XTOUT

XTIN

XOUT

XIN

Output latch

(for each bit)

P0DR0 write

P00

(XIN)

Note1 : R = 100

Ω (typ.)

Note2 : Rf = 1.2M

Ω (typ.)

Note3 : Ro = 0.5k

Ω (typ.)

Note4 : RIN3 = 50k

Ω (typ.)

P0PRD0 read

Function control

(for each bit)

Input/output control

(for each bit)

P0FC0 write

P0CR0 write

VDD

Pull-up control

(for each bit)

P0PU0 write

SYSCR2<XEN>

P0DR1 write

P01

(XOUT)

RIN3

P0PRD1 read

System clock reset

(internal factor reset)

P0CR1 write

Programmable

pull-up resistor

Programmable

pull-up resistor

VDD

P0PU1 write

SYSCR1<STOP>

SYSCR1<OUTEN>

Reset signal

Pull-up control

(for each bit)

Input/output control

(for each bit)

Output latch

(for each bit)

TMP89FS60 Datasheet(PDF) 109 Page - Toshiba Semiconductor

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