IL600 Series Isolators

11

NVE Corporation 11409 Valley View Road, Eden Prairie, MN 55344-3617

(952) 829-9217

www.nve.com

YouTube.com/NveCorporation

iso-apps@nve.com

2500

16

5000

3

500

1000

Signal

Rise/Fall Time (ns)

C

Boost (pF)

2500

16

5000

3

500

1000

Signal

Rise/Fall Time (ns)

C

Boost (pF)

Non-inverting and Inverting Configurations

IL600-Series Isolators can be configured in non-

inverting and inverting configurations (see Figure 3).

In a typical non-inverting circuit, the In− terminal is

connected via a 1 kΩ input resistor to the supply rail,

and the input is connected to the In+ terminal. The

supply voltage is +5 V and the input signal is a 5 V

CMOS signal. When a logic high (+5 V) is applied to

the input, the current through the coil is zero. When

the input is a logic low (0 V), at least 5 mA flows

through the coil from the In− side to the In+ side.

The inverting configuration is similar to standard

logic. In the inverting configuration, the signal into

the coil is differential with respect to ground. The

designer must ensure that the difference between the

logic low voltage and the coil ground is such that the

residual coil current is less than 0.5 mA.

The IL612 and IL614 devices have some inputs that

do not offer inverting operation. The IL612 coil In−

input is hardwired internally to the device power

supply; therefore it is important to ensure the isolator

power supply is at the same voltage as the power

supply to the source of the input logic signal. The

IL614 has a common coil In− for two inputs. This

pin should be connected to the power supply for the

logic driving channels 2 and 3, and the channels run

should be run in non-inverting mode.

Both single ended and differential inputs can be

handled without reverse bias protection.

Boost Capacitor

The boost capacitor in parallel with the current-limiting resistor boosts the instantaneous coil current at the signal transition. This

ensures switching and reduces propagation delay and reduces pulse-width distortion.

Select the value of the boost capacitor based on the rise and fall

times of the signal driving the inputs. The instantaneous boost

capacitor current is proportional to input edge speeds (

). Select a

capacitor value based on the rise and fall times of the input signal to be

isolated that provides approximately 20 mA of additional “boost”

current. Figure 4 is a guide to boost capacitor selection. For high-speed

logic signals (tr,tf < 10 ns), a 16 pF capacitor is recommended. The

capacitor value is generally not critical; if in doubt, choose a higher

value.

Figure 3. Non-inverting and inverting circuits

Figure 4. Cboost Selector

dV

dt

C

V

DD

GND

2

5

6

7

8

47 nF

Non-Inverting Circuit

Data Out

+5 V

GND

1

820R

3

2

Data In

C

boost

IL610

-

+

+5 V

V

DD

GND

1

GND

2

820R

3

2

5

6

8

IL610

Inverting Circuit

-

+

Data In

Data Out

7

C

boost

47 nF