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AD3531 Datasheet(PDF) 39 Page - Analog Devices

Part # AD3531
Description  4-Channel, 16-Bit Voltage Output DAC, On-Chip Reference, SPI
PDF  44 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD3531 Datasheet(HTML) 39 Page - Analog Devices

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Data Sheet
AD3531/AD3531R
REGISTER DETAILS
analog.com
Rev. 0 | 39 of 44
Table 29. Bit Descriptions for MUX_OUT_SELECT_0 (Continued)
Bits
Bit Name
Description
Reset
Access
0x19: Die temperature. A voltage representation of internal die temperature can monitored on MUX_OUT pin.
0x1A: AGND. MUX_OUT pin internally tied to AGND.
STATUS CONTROL REGISTER
Address: 0xC2, Reset: 0x04, Name: STATUS_CONTROL
Event flags due to start up sequence, interface, reset, and update can be read. Write 1 to clear.
0
0
1
0
2
1
3
0
4
0
5
0
6
0
7
0
[7:4] RESERVED
[0] RESERVED
[3] UPDATE_ERR (R/W1C)
[1] INTERFACE_ERR (R/W1C)
[2] RESET_WARNING (R/W1C)
Table 30. Bit Descriptions for STATUS_CONTROL
Bits
Bit Name
Description
Reset
Access
[7:4]
RESERVED
Reserved.
0x0
R
3
UPDATE_ERR
Update Error. Status to indicate that there was an attempt to update a DAC_Chn within 640ns since the
last update.
0x0
R/W1C
0: Error 0. All updates successful.
1: Error 1. Overlapping updates attempted.
2
RESET_WARNING
Reset Warning. Status to indicate if the device went through a reset event.
0x1
R/W1C
0: Warning 0. Reset warning flag cleared.
1: Warning 1. Reset event occurred.
1
INTERFACE_ERR
Interface Error. Status to indicate an error flag is asserted in INTERFACE_STATUS_A.
0x0
R/W1C
0: Error 0. No interface error.
1: Error 1. Interface error.
0
RESERVED
Reserved.
0x0
R
HARDWARE LDAC ENABLE 0 REGISTER
Address: 0xD0, Reset: 0x0F, Name: HW_LDAC_EN_0
Enable hardware LDAC functionality for channel 0 to channel 3
0
1
1
1
2
1
3
1
4
0
5
0
6
0
7
0
[7:4] RESERVED
[0] HLD_EN_CH_0 (R/W)
[3] HLD_EN_CH_3 (R/W)
[1] HLD_EN_CH_1 (R/W)
[2] HLD_EN_CH_2 (R/W)
Table 31. Bit Descriptions for HW_LDAC_EN_0
Bits
Bit Name
Description
Reset
Access
[7:4]
RESERVED
Reserved.
0x0
R
3
HLD_EN_CH_3
Hardware LDAC Enable Channel 3. Enable/disable hardware LDAC functionality on Channel 3.
0x1
R/W
0: HLD En 0. Disable hardware LDAC on Channel 3.
1: HLD En 1. Enable hardware LDAC on Channel 3.
2
HLD_EN_CH_2
Hardware LDAC Enable Channel 2. Enable/disable hardware LDAC functionality on Channel 2.
0x1
R/W
0: HLD En 0. Disable hardware LDAC on Channel 2.
1: HLD En 1. Enable hardware LDAC on Channel 2.



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