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ACT4911 Datasheet(PDF) 24 Page - Qorvo, Inc

Part # ACT4911
Description  Power Loss Protection with 6A eFuse
PDF  33 Pages
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Manufacturer  QORVO [Qorvo, Inc]
Direct Link  https://www.qorvo.com/
Logo QORVO - Qorvo, Inc

ACT4911 Datasheet(HTML) 24 Page - Qorvo, Inc

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Data Sheet Rev. C, August 2021 | Subject to change without notice
24 of 33
www.qorvo.com
ACT4911
Power Loss Protection with 6A eFuse
®
SCALE_HCHK _2X and SCALE_HCHK _4X in register
0x27h [1:0].
The ACT4911 allows for very flexible health checking
routines by allowing the system to manually enable the
10mA
discharge
current
by
setting
the
EN_STR10mASINK bit = 1. In this situation, the system
manually turns the discharge current on and off. The
storage capacitor voltage threshold is still determined
by the HMON_THR register. This function is useful for
checking extremely large capacitor values which need
very long discharge times.
PG_THR
(Programmable)
VSTR
Initial Charge Health Testing
Top-Off
Maintain
V
10mA
50mA
I
200us
Programmable
Discharge Time
Programmable
Interval Time
t
t
0
0
Storage CapVoltage
Discharge Current
Figure 6: Storage Voltage at Different Stages
The register HMON_TSET [3:0] sets the health check
discharge time as shown in Table 7. This also allows the
use of the ADC to check the slope of the discharge and
calculate the capacitance.
Table 7: Health Check Discharge Time
HMON_TSET[2:0]
HMON_TSET[3] (ms)
0
1
000
2
384
001
4
512
010
8
640
011
16
768
100
32
896
101
64
1024
110
128
1152
111
256
1280
ADC MONITORING
General Description
The ACT4911 contains a built-in analog to digital
converter, ADC, which can be used to monitor five
system level parameters. These include input voltage,
output voltage, storage capacitor voltage, eFuse current,
and die temperature. It is a single 8 bit delta-sigma ADC
that uses an analog input multiplexer to select one of six
channels for the A/D conversion. The resulting digital
results are stored in six digital registers. A six to one
multiplexer connects one of the ADC output registers to
the user accessible register map.
ADC Configuration
The ACT4911 ADC is configured through the I2C
interface. It is enabled and disabled by the EN_ADC
register bit. The ADC has two conversion modes,
manual single-shot conversion and automatic polling
conversion.
Single-Shot Conversion
Configure the IC for single-shot conversion mode by
setting the following I2C bits in register 0x08h
ADC_ONE_SHOT = 1.
ADC_CH_SCAN = 0
EN_ADCBUF = 1
In single shot mode, the user defines the input channel
to be converted and then manually initiates the ADC
conversion. I2C bits ADC_CH_CONV [2:0] in register
0x08h select the input channel to be converted.
ADC_CH_READ [2:0] selects the ADC channel to be
read. These should be set to the same channel. The
user initiates an ADC read by writing a 1 into EN_ADC
in register 0x08h. When ADC conversion is complete,
the ADC_DATA_READY bit (register 0x07h [7]) is set to
1, nIRQ is asserted low, and EN_ADC automatically
changes back to 0. The uP can then read the status bits
to find that the ADC conversion is complete. The ADC
data are stored in ADC_DOUT [13:6] in register 0x05h.
nIRQ stays asserted low and the ADC_READY_BIT
stays equal to 1 until the ADC data is read. Reading the
ADC data automatically deasserts nIRQ. To initiate
another ADC conversion for the same channel, set
EN_ADC=1. To initiate an ADC conversion for another
channel,
change
ADC_CH_CONV
and
ADC_CH_READ to the appropriate channel and then
set EN_ADC=1.



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