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ACT4911 Datasheet(PDF) 25 Page - Qorvo, Inc

Part # ACT4911
Description  Power Loss Protection with 6A eFuse
PDF  33 Pages
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Manufacturer  QORVO [Qorvo, Inc]
Direct Link  https://www.qorvo.com/
Logo QORVO - Qorvo, Inc

ACT4911 Datasheet(HTML) 25 Page - Qorvo, Inc

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Data Sheet Rev. C, August 2021 | Subject to change without notice
25 of 33
www.qorvo.com
ACT4911
Power Loss Protection with 6A eFuse
®
6 to 1
MUX
ADC
CH0
CH1
CH5
CH2
8 Bit
Result
Clock
SEL[2:0]
Figure 7: ADC Block Diagram
Automatic Polling Conversion
Configure the IC for automatic polling conversion mode
by setting the following I2C bits in register 0x08h
ADC_ONE_SHOT = 0
ADC_CH_SCAN = 1
EN_ADCBUF = 1
Start the automatic polling by changing EN_ADC to 1.
When in automatic polling mode, the ADC continuously
changes the MUX inputs to read all input channels. The
ADC continually overwrites the data in the output
register. After all channels have been converted, the
ADC_DATA_READY bit is set to 1. Note that nIRQ is not
asserted low in Automatic Polling mode. Ensure that
ADC
data
is
valid
and
ready
by
reading
the
ADC_DATA_READY before reading ADC data. After the
ADC_DATA_READY bit is set to 1, the user defines the
channel to be read with the ADC_CH_CONV [2:0] bits
in register 0x08h. Change ADC_CH_CONV to read
additional channels.
Table 8: ADC Channels
Channel Channel Description
ADC_CH_CONV[2:0]
ADC_CH_READ[2:0]
Value
CH0
Input Current
000
000
IIN = (DOUT-128)*1.221/RILIM (A)
CH1
Input Voltage
001
001
VIN = (DOUT-128)*0.392 (V)
CH2
Storage Cap Voltage
010
010
VSTR = (DOUT-128)*0.392 (V)
CH3
Output Voltage
011
011
VOUT = (DOUT-128)*0.392 (V)
CH4
Die Temperature
100
100
Temp = 6.125*DOUT-1053.75 (deg C)
CH5
GND
101
101
Autonomous ADC Supervisory Function
The ACT4911 can be configured to automatically
measure any or all of the five system level parameters
and then then automatically notify the system if one of
the parameters falls out of its specified range. This
check is performed automatically, without any external
circuit components. The ACT4911 implements this
using internal digital undervoltage and overvoltage
comparators for all five ADC channels. Table 9 shows
each ADC channel’s undervoltage and overvoltage
registers. When in automatic polling mode, if an ADC
conversion result is below the undervoltage threshold or
above the overvoltage threshold, the IC asserts nIRQ
low. The uP can then read the status register 0x04h to
determine which parameter is out of range. nIRQ can
be masked by setting the ADC_OUTRNG_IRQ_MASK
bit. The default thresholds are determined by each ICs
CMI, but can be changed at any time after startup.
Disable
a
channel’s
supervisory
function
by
programming the undervoltage register value to 0x00h
and the overvoltage register to 0xFFh.
Table 9: ADC Thresholds Registers
Undervoltage
Threshold
Register
Overvoltage
Threshold
Register
Input Current
0x0Ch
0x14h
Input Voltage
0x0Dh
0x15h
Storage Cap Voltage 0x0Eh
0x16h
Output Voltage
0x0Fh
0x17h
Die Temperature
0x10h
0x18h



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