ADE9178 datasheet(113/122 Pages) AD

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Data Sheet

ADE9178

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Rev. A | 113 of 122

Table 34. ADE9178 Register Details (Continued)

Addr

Name

Bits

Bit Name

Settings

Description

Reset

Access

VABDIPONE

VP2P Dip Condition Detected.

Set this bit to enable an

interrupt when the VP2P (AV

− BV) voltage is in the dip

condition and is zero when it

is not in a dip condition, as

calculated by RMSONE.

0x0

R/W

VSUMSWELLONE

VSUM Swell Condition

Detected. Set this bit to enable

an interrupt when the sum of

voltage channels is in the swell

condition and is zero when it

is not in a swell condition, as

calculated by RMSONE.

0x0

R/W

AUX5SWELLONE

Auxiliary 5 Channel Swell

Condition Detected. Set this bit

to enable an interrupt when the

AUX5 channel is in the swell

condition and is zero when it

is not in a swell condition, as

calculated by RMSONE.

0x0

R/W

AUX4SWELLONE

Auxiliary 4 Channel Swell

Condition Detected. Set this bit

to enable an interrupt when the

AUX4 channel is in the swell

condition and is zero when it

is not in a swell condition, as

calculated by RMSONE.

0x0

R/W

AUX3SWELLONE

Auxiliary 3 Channel Swell

Condition Detected. Set this bit

to enable an interrupt when the

AUX3 channel is in the swell

condition and is zero when it

is not in a swell condition, as

calculated by RMSONE.

0x0

R/W

AUX2SWELLONE

Auxiliary 2 Channel Swell

Condition Detected. Set this bit

to enable an interrupt when the

AUX2 channel is in the swell

condition and is zero when it

is not in a swell condition, as

calculated by RMSONE.

0x0

R/W

AUX1SWELLONE

Auxiliary 1 Channel Swell

Condition Detected. Set this bit

to enable an interrupt when the

AUX1 channel is in the swell

condition and is zero when it

is not in a swell condition, as

calculated by RMSONE.

0x0

R/W

AUX0SWELLONE

Auxiliary 0 Channel Swell

Condition Detected. Set this bit

to enable an interrupt when the

AUX0 channel is in the swell

condition and is zero when it

is not in a swell condition, as

calculated by RMSONE.

0x0

R/W

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