ADE9178 datasheet(116/122 Pages) AD

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Data Sheet

ADE9178

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Rev. A | 116 of 122

Table 34. ADE9178 Register Details (Continued)

Addr

Name

Bits

Bit Name

Settings

Description

Reset

Access

AIDIPONE

Phase A Current Dip Condition

Detected. Set this bit to enable

an interrupt when the phase A

current is in the dip condition

and is zero when it is not in a

dip condition, as calculated by

RMSONE.

0x0

R/W

AVDIPONE

Phase A Voltage Dip Condition

Detected. Set this bit to enable

an interrupt when the phase A

voltage is in the dip condition

and is zero when it is not in a

dip condition, as calculated by

RMSONE.

0x0

R/W

0x408

MASK3

[31:24]

RESERVED

Reserved.

0x0

AUX5SWELLHALF

Auxiliary 5 Channel Swell

Condition Detected. Set this bit

to enable an interrupt when the

AUX5 channel is in the swell

condition and is zero when it

is not in a swell condition, as

calculated by RMSHALF.

0x0

R/W

AUX4SWELLHALF

Auxiliary 4 Channel Swell

Condition Detected. Set this bit

to enable an interrupt when the

AUX4 channel is in the swell

condition and is zero when it

is not in a swell condition, as

calculated by RMSHALF.

0x0

R/W

AUX3SWELLHALF

Auxiliary 3 Channel Swell

Condition Detected. Set this bit

to enable an interrupt when the

AUX3 channel is in the swell

condition and is zero when it

is not in a swell condition, as

calculated by RMSHALF.

0x0

R/W

AUX2SWELLHALF

Auxiliary 2 Channel Swell

Condition Detected. Set this bit

to enable an interrupt when the

AUX2 channel is in the swell

condition and is zero when it

is not in a swell condition, as

calculated by RMSHALF.

0x0

R/W

AUX1SWELLHALF

Auxiliary 1 Channel Swell

Condition Detected. Set this bit

to enable an interrupt when the

AUX1 channel is in the swell

condition and is zero when it

is not in a swell condition, as

calculated by RMSHALF.

0x0

R/W

AUX0SWELLHALF

Auxiliary 0 Channel Swell

Condition Detected. Set this bit

to enable an interrupt when the

AUX0 channel is in the swell

condition and is zero when it

0x0

R/W

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