ADE9178 datasheet(118/122 Pages) AD

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Data Sheet

ADE9178

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Rev. A | 118 of 122

Table 34. ADE9178 Register Details (Continued)

Addr

Name

Bits

Bit Name

Settings

Description

Reset

Access

is not in a dip condition, as

calculated by RMSHALF.

AUX3DIPHALF

Auxiliary 3 Channel Dip

Condition Detected. Set this bit

to enable an interrupt when the

AUX3 channel is in the dip

condition and is zero when it

is not in a dip condition, as

calculated by RMSHALF.

0x0

R/W

AUX2DIPHALF

Auxiliary 2 Channel Dip

Condition Detected. Set this bit

to enable an interrupt when the

AUX2 channel is in the dip

condition and is zero when it

is not in a dip condition, as

calculated by RMSHALF.

0x0

R/W

AUX1DIPHALF

Auxiliary 1 Channel Dip

Condition Detected. Set this bit

to enable an interrupt when the

AUX1 channel is in the dip

condition and is zero when it

is not in a dip condition, as

calculated by RMSHALF.

0x0

R/W

AUX0DIPHALF

Auxiliary 0 Channel Dip

Condition Detected. Set this bit

to enable an interrupt when the

AUX0 channel is in the dip

condition and is zero when it

is not in a dip condition, as

calculated by RMSHALF.

0x0

R/W

CIDIPHALF

Phase C Current Dip Condition

Detected. Set this bit to enable

an interrupt when the phase C

current is in the dip condition

and is zero when it is not in a

dip condition, as calculated by

RMSHALF.

0x0

R/W

CVDIPHALF

Phase C Voltage Dip Condition

Detected. Set this bit to enable

an interrupt when the phase C

voltage is in the dip condition

and is zero when it is not in a

dip condition, as calculated by

RMSHALF.

0x0

R/W

BIDIPHALF

Phase B Current Dip Condition

Detected. Set this bit to enable

an interrupt when the phase B

current is in the dip condition

and is zero when it is not in a

dip condition, as calculated by

RMSHALF.

0x0

R/W

BVDIPHALF

Phase B Voltage Dip Condition

Detected. Set this bit to enable

an interrupt when the phase B

voltage is in the dip condition

and is zero when it is not in a

0x0

R/W

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