March 26, 2021

3.2

ES9016K2M Datasheet

17

ESS TECHNOLOGY, INC. 109 Bonaventura Drive, San Jose, CA 95134, USA Tel (408) 643-

8800 • www.esstech.com

Register #11: Channel Mapping

8 bit, Read-Write Register, Default = 0x02

Bits

[7]

[6]

[5]

[4]

[3]

[2]

[1]

[0]

Mnemonic

reserved *

spdif_sel

ch2_analog_swap

ch1_analog_swap

ch2_sel

ch1_sel

Default

0

0

0

0

0

0

1

0

Bit

Mnemonic

Description

[7]

reserved *

[6:4]

spdif_sel

select the spdif data source

3’d0 = DATA_CLK (default)

3’d1 = DATA2

3’d2 = DATA1

3’d3 = GPIO1

3’d4-7: reserved

[3]

ch2_analog_swap

1'b0 = normal operation (default)

1'b1 = swap dac and dacb

[2]

ch1_analog_swap

1'b0 = normal operation (default)

1'b1 = swap dac and dacb

[1]

ch2_sel

1'b0 = left

1'b1 = right (default)

[0]

ch1_sel

1'b0 = left (default)

1'b1 = right

* All Reserved Bits in Register #11 must be set to the indicated logic level to ensure correct device operation.

Left and Right channels can be reversed using Register #11.