3.2

March 26, 2021

ES9016K2M Datasheet

ESS TECHNOLOGY, INC. 109 Bonaventura Drive, San Jose, CA 95134, USA Tel (408) 643-

8800 • www.esstech.com

28

ANALOG PERFORMANCE

Test Conditions (unless otherwise stated)

1. TA = 25oC, AVCCDAC = VCCA = DVCC = 3.3V, internal DVDD with 4.7F ±20% decoupling, fs = 44.1kHz, MCLK = 27MHz & 32-bit data

2. SNR/DNR: A-weighted over 20Hz-20kHz in averaging mode

THD+N: un-weighted over 20Hz-20kHz bandwidth

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNIT

Resolution

32

Bits

MCLK (PCM normal mode)

Note *3

192FSR

Note *2

Hz

MCLK (PCM OSF bypass mode)

24FSR

MCLK (DSD mode)

3FSR

MCLK (SPDIF mode)

386FSR

DYNAMIC PERFORMANCE

DNR (differential current mode)

–60dBFS

122

dB-A

THD+N (differential current mode)

0dBFS

–110

dB

ANALOG OUTPUT

Differential (+ or

–) voltage out range

(Note *4)

Full-scale out

3.05

(0.924 x AVCCDAC)

Vp-p

Differential (+ or

–) voltage out offset

(Note *4)

Bipolar zero out

1.65

(AVCCDAC / 2)

V

Differential (+ or

–) current out range

(Notes *1, *4)

Full-scale out

3.784

mAp-p

Differential (+ or

–) current out offset

(Notes *1, *4)

Bipolar zero out

to virtual ground

at voltage Vg (V)

2.047

– (1000 x Vg) /

806

mA

Digital Filter Performance

De-emphasis error

0.2

dB

Mute Attenuation

127

dB

PCM Filter Characteristics (Sharp Roll Off)

Pass band

0.003dB

0.454fs

Hz

–3dB

0.49fs

Hz

Stop band

<

–115dB

0.546fs

Hz

Group Delay

35 / fs

s

PCM Filter Characteristics (Slow Roll Off)

Pass band

0.05dB

0.308fs

Hz

–3dB

0.454fs

Hz

Stop band

<

–100dB

0.814fs

Hz

Group Delay

6.25 / fs

s

PCM Filter Characteristics (Minimum Phase)

Pass band

0.003dB

0.454fs

Hz

–3dB

0.49fs

Hz

Stop band

<

–115dB

0.546fs

Hz

Notes:

*1. Differential (+ or

–) current output is equivalent to a differential (+ or –) voltage source in series with an 806

 11%

resistor. The differential (+ or

–) voltage source has a peak-to-peak output range of 0.924 x AVCCDAC = 3.05V and

an output offset of AVCCDAC / 2 = 1.65V.

*2. With internal DVDD, maximum MCLK frequency is 50MHz (DVCC = 1.8V), or 100MHz (DVCC = 3.3V) with an

external +1.3V DVDD supply.

*3. Synchronous MCLK at 128 x FSR is also supported.

*4. Values are valid for AVCCDAC = 3.3V. For AVCCDAC = 1.8V, formulas should be used.