LM94021

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SNIS138E – FEBRUARY 2005 – REVISED JUNE 2013

ELECTRICAL CHARACTERISTICS

Unless otherwise noted, these specifications apply for +VDD = +1.5V to +5.5V . Boldface limits apply for TA = TJ = TMIN to

TMAX ; all other limits TA = TJ = 25°C.

UNITS

PARAMETER

CONDITIONS

TYPICAL (1)

LIMITS (2)

(LIMIT)

GS1 = 0, GS0 = 0

−5.5

mV/°C

GS1 = 0, GS1 = 1

−8.2

mV/°C

Sensor Gain

GS1 = 1, GS0 = 0

−10.9

mV/°C

GS1 = 1, GS0 = 1

−13.6

mV/°C

Source

≤ 2.0 μA (4)

−1

mV (max)

Load Regulation (3)

Sink

≤ 100 μA

1.6

mV (max)

Sink = 50

μA

0.4

mV

Line Regulation (5)

(VDD - VOUT) ≥ 200 mV

200

μV/V

TA = +30°C to +150°C

9

12

μA (max)

IS

Supply Current

TA = −50°C to +150°C

13

μA (max)

CL

Output Load Capacitance

1100

pF (max)

CL= 0 pF

0.7

1.6

ms (max)

Power-on Time (6)

CL=1100 pF

0.8

2.4

ms (max)

GS1 and GS0 Input Logic "1" Threshold

VIH

VDD- 0.5V

V (min)

Voltage

GS1 and GS0 Input Logic "0" Threshold

VIL

0.5

V (max)

Voltage

IIH

Logic "1" Input Current (7)

0.001

1

μA (max)

IIL

Logic "0" Input Current (7)

0.001

1

μA (max)

(1)

Typicals are at TJ = TA = 25°C and represent most likely parametric norm.

(2)

Limits are ensured to TI's AOQL (Average Outgoing Quality Level).

(3)

Source currents are flowing out of the LM94021. Sink currents are flowing into the LM94021.

(4)

Assumes (VDD - VOUT) ≥ 200 mV.

(5)

Line regulation is calculated by subtracting the output voltage at the highest supply voltage from the output voltage at the lowest supply

voltage. The typical line regulation specification does not include the output voltage shift discussed in Section 5.0.

(6)

Specified by design.

(7)

The input current is leakage only and is highest at high temperature. It is typically only 0.001 µA. The 1 µA limit is solely based on a

testing limitation and does not reflect the actual performance of the part.

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