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AFE5805 Datasheet(PDF) 12 Page - Texas Instruments

Part # AFE5805
Description  FULLY-INTEGRATED, 8-CHANNEL ANALOG FRONT-END FOR ULTRASOUND 0.85nV/√Hz, 12-Bit, 50MSPS, 122mW/Channel
PDF  53 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

AFE5805 Datasheet(HTML) 12 Page - Texas Instruments

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D0
D1
D2
D3
D4
D5
D6
D7
D8
D9 D10 D11 D0
D1
D2
D3
D4
D5 D6
D7
D8
D9 D10 D11
D0
D1
D2
D3
D4 D5
D6
D7
D8
D9 D10 D11
Sample n
Sample n+12
t
PROP
t (A)
D
12clockslatency
ADC
Input
(1)
Clock
Input
6XFCLK
LCLKM
LCLKP
1XFCLK
FCLKM
FCLKP
SERIAL DATA
OUTP
OUTM
t
SAMPLE
Sample n+13
t
H1
t
SU1
t
H2
t
SU2
LCLKM
LCLKP
OUTM
OUTP
t
=min(t
,t
)
t =min(t ,t )
SU
SU1
SU2
H
H1
H2
AFE5805
SBOS421D – MARCH 2008 – REVISED MARCH 2010
www.ti.com
LVDS TIMING DIAGRAM
(1) Referenced to ADC Input (internal node) for illustration purposes only.
DEFINITION OF SETUP AND HOLD TIMES
TIMING CHARACTERISTICS
(1)
AFE5805
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
tD(A)
ADC aperture delay
1.5
4.5
ns
Aperture delay variation
Channel-to-channel within the same device (3s)
±20
ps
tJ
Aperture jitter
400
fS, rms
Time to valid data after coming out of
50
ms
COMPLETE POWER-DOWN mode
Time to valid data after coming out of PARTIAL
tWAKE
Wake-up time
POWER-DOWN mode (with clock continuing to
2
ms
run during power-down)
Time to valid data after stopping and restarting
40
ms
the input clock
Clock
Data latency
12
cycles
(1)
Timing parameters are ensured by design and characterization; not production tested.
12
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Copyright © 2008–2010, Texas Instruments Incorporated
Product Folder Link(s): AFE5805



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