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LM73 Datasheet(PDF) 22 Page - Texas Instruments |
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LM73 Datasheet(HTML) 22 Page - Texas Instruments |
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22 / 31 page ![]() VDD R1 LM73 R2 C1 GND SMBDAT SMBCLK VDD 22 LM73-Q1 SNIS194 – DECEMBER 2016 www.ti.com Product Folder Links: LM73-Q1 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated 9 Power Supply Recommendations In systems where there is a large amount of capacitance on the VDD node, the LM73-Q1 power supply ramp-up time can become excessively long. Slow power-supply ramp times may result in abnormal temperature readings. A linear power-on-ramp of less than 0.7 V/msec and an exponential ramp with an RC time constant of more than 1.25 msec is categorized as a slow power-supply ramp. To avoid errors, use the power up sequence described below. The software reset sequence is as follows: 1. Allow VDD to reach the specified minimum operating voltage, as specified in the Recommended Operating Conditions section. 2. Write a 1 to the Full Power Down bit, Bit 7 of the Configuration Register, and hold it high for the specified maximum conversion time for the initial default of 11-bits resolution. This ensures that a complete reset operation has occurred. See the Temperature Conversion Time specifications within the Temperature-to- Digital Converter Characteristics for more details. 3. Write a 0 to the Full Power Down bit to restore the LM73-Q1 to normal mode. 10 Layout 10.1 Layout Guidelines To achieve the expected results when measuring temperature with an integrated circuit temperature sensor like the LM73-Q1, it is important to understand that the sensor measures its own die temperature. For the LM73-Q1, the best thermal path between the die and the outside world is through the LM73-Q1's pins. In the SOT-23 package, all the pins on the LM73-Q1 will have an equal effect on the die temperature. Because the pins represent a good thermal path to the LM73-Q1 die, the LM73-Q1 will provide an accurate measurement of the temperature of the printed circuit board on which it is mounted. 10.2 Layout Example Figure 15. PBC Layout |
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