4

LM73-Q1

SNIS194 – DECEMBER 2016

www.ti.com

Product Folder Links: LM73-Q1

Submit Documentation Feedback

Copyright © 2016, Texas Instruments Incorporated

(1)

Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended

Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2)

Soldering process must comply with Texas Instruments' Reflow Temperature Profile specifications. Refer to www.ti.com/packaging..

Reflow temperature profiles are different for lead-free and non-lead-free packages.

(3)

When the input voltage (VI) at any pin exceeds the power supplies (VI < GND or VI > VDD), the current at that pin should be limited to 5

mA.

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)

(1) (2)

MIN

NOM

MAX

UNIT

Supply Voltage

−0.3

V to 6

V

Voltage at SMBCLK and SMBDAT pins

−0.3 V to V

6

V

Voltage at All Other Pins

−0.3

(VDD + 0.5)

6

V

Input Current at Any Pin(3)

±5

mA

Storage Temperature, Tstg

−65

150

°C

(1)

AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

6.2 ESD Ratings

VALUE

UNIT

V(ESD)

Electrostatic discharge

Human-body model (HBM), per AEC Q100-002(1)

±2000

V

Charged-device model (CDM), per AEC Q100-011

±1000

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

MIN

MAX

UNIT

LM73-Q1

–40

125

°C

Supply Voltage Range (VDD)

2.7

5.5

V

(1)

For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report.

6.4 Thermal Information

THERMAL METRIC(1)

LM73-Q1

UNIT

DDC (SOT)

6 PINS

RθJA

Junction-to-ambient thermal resistance

117

°C/W

RθJC(top)

Junction-to-case (top) thermal resistance

55

RθJA

Junction-to-board thermal resistance

25

ψJT

Junction-to-top characterization parameter

1

ψJB

Junction-to-board characterization parameter

21