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LM73-Q1

SNIS194 – DECEMBER 2016

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Copyright © 2016, Texas Instruments Incorporated

7.3.4 SMBus Interface

The LM73-Q1 operates as a slave on the SMBus. The SMBDAT line is bidirectional. The SMBCLK line is an

input only. The LM73-Q1 never drives the SMBCLK line and it does not support clock stretching.

The LM73-Q1 uses a 7-bit slave address. It is available in two versions. Each version can be configured for one

of three unique slave addresses, for a total of six unique address.

PART

NUMBER

ADDRESS

PIN

DEVICE

ADDRESS

LM73C0-

Q1

Float

Ground

VDD

1001 000

1001 001

1001 010

LM73C1-

Q1

Float

Ground

VDD

1001 100

1001 101

1001 110

The SMBDAT output is an open-drain output and does not have internal pull-ups. A “high” level will not be

observed on this pin until pull-up current is provided by some external source, typically a pull-up resistor. Choice

of resistor value depends on many system factors but, in general, the pull-up resistor should be as large as

possible without effecting the SMBus desired data rate. This will minimize any internal temperature reading

errors due to internal heating of the LM73-Q1.

The LM73-Q1 features an integrated low-pass filter on both the SMBCLK and the SMBDAT line. These filters

increase communications reliability in noisy environments.

If either the SMBCLK or SMBDAT line is held low for a time greater than tTIMEOUT (see Logic Electrical

Characteristics for the value of tTIMEOUT), the LM73-Q1 state machine will reset to the SMBus idle state, releasing

the data line. Once the SMBDAT is released high, the master may initiate an SMBus start.

7.3.5 ALERT Function

The ALERT output is an over-temperature indicator. At the end of every temperature conversion, the measured

temperature is compared to the value in the THIGH Register. If the measured temperature exceeds the value

stored in THIGH, the ALERT output goes active (see Figure 5). This over-temperature condition will also cause the

ALRT_STAT bit in the Control/Status Register to change value (this bit mirrors the logic level of the ALERT pin).

The ALERT pin and the ALRT_STAT bit are cleared when any of the following occur:

•

The measured temperature falls below the value stored in the TLOW Register

•

A 1 is written to the ALERT Reset bit in the Configuration Register

•

The master resets it through an SMBus Alert Response Address (ARA) procedure

If ALERT has been cleared by the master writing a 1 to the ALERT Reset bit, while the measured temperature

still exceeds the THIGH setpoint, ALERT will go active again after the completion of the next temperature

conversion.

Each temperature reading is associated with a Temperature High (THI) and a Temperature Low (TLOW) flag in

the Control/Status Register. A digital comparison determines whether that reading is above the THIGH setpoint or

below the TLOW setpoint. If so, the corresponding flag is set. All digital comparisons to the THIGH, and TLOW values

are based on an 11-bit temperature comparison. Regardless of the resolution setting of the LM73-Q1, the lower

three temperature LSBs will not affect the state of the ALERT output, THI flag, and TLOW flag.