Enable

Controller

Bias

Generator

Over

Current and

Thermal

Protection

LDO Core

and

Reference

IN

OUT

GND

EN

LP5951

SNVS345G – JUNE 2006 – REVISED DECEMBER 2014

www.ti.com

7 Detailed Description

7.1 Overview

The LP5951 regulator is designed to meet the requirements of portable battery-powered systems providing a

regulated output voltage and low quiescent current. When switched to shutdown mode via a logic signal at the

EN pin, the power consumption is reduced to virtually zero.

7.2 Functional Block Diagram

7.3 Feature Description

7.3.1 No-Load Stability

The LP5951 will remain stable and in regulation with no external load. This is an important consideration in some

circuits, for example CMOS RAM keep-alive applications.

7.3.2 Enable Operation

The LP5951 may be switched ON or OFF by a logic input at the Enable pin, EN. A logic high at this pin will turn

the device on. When the EN pin is low, the regulator output is off and the device typically consumes 5 nA.

If the application does not require the enable switching feature, the EN pin should be tied to VIN to keep the

regulator output permanently on.

To ensure proper operation, the signal source used to drive the VEN input must be able to swing above and

below the specified turn-on/off voltage thresholds listed in the Enable Control Characteristics table, VIL and VIH.

7.3.3 Fast Turn Off And On

The controlled switch-off feature of the device provides a fast turn off by discharging the output capacitor via an

internal FET device. This discharge is current limited by the RDSon of this switch.

Fast turnon is ensured by an optimized architecture allowing a very fast ramp of the output voltage to reach the

target voltage.

7.3.4 Short-Circuit Protection

The LP5951 is short circuit protected and in the event of a peak over-current condition, the output current

through the PMOS will be limited.

If the over-current condition exists for a longer time, the average power dissipation will increase depending on

the input to output voltage difference until the thermal shutdown circuitry will turn off the PMOS.

Please refer to the Thermal Information section for power dissipation calculations.

8

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