z

Z

Z

R

F

C

´

´

´

=

1

2

1

p

z

P

P

R

F

C

´

´

´

=

1

2

1

p

-6

6

2

25000

3.3

54

10

8

10

Rz =

= 29.2 k

12

800

0.8

p

´

´

´

´

´

´

´

W

´

´

1

=

= 928 pF

2

6010

29200

Cz

p

´

´

´

1

=

= 51 pF

2

103900

29200

Cp

p

´

´

´

TPS54331-Q1

SLVSAB5 – NOVEMBER 2010

www.ti.com

(26)

(27)

For this design, the two 47-mF output capacitors are used. For ceramic capacitors, the actual output capacitance

is less than the rated value when the capacitors have a dc bias voltage applied. This is the case in a dc/dc

converter. The actual output capacitance may be as low as 54 mF. The combined ESR is approximately .001 Ω.

Using Equation 19 and Equation 20, the output stage gain and phase loss are equivalent as:

Gain = –2.26 dB

and

PL - –83.52 degrees

For 70 degrees of phase margin, Equation 21 requires 63.52 degrees of phase boost.

Equation 22, Equation 23, and Equation 24 are used to find the zero and pole frequencies of:

FZ1 = 5883 Hz

And

FP1 = 106200 Hz

RZ, CZ, and CP are calculated using Equation 25, Equation 26, and Equation 27:

(28)

(29)

(30)

Using standard values for R3, C6, and C7 in the application schematic of Figure 13:

R3 = 29.4 k

Ω

C6 = 1000 pF

C7 = 47 pF

BOOTSTRAP CAPACITOR

Every TPS54331 design requires a bootstrap capacitor, C4. The bootstrap capacitor must be 0.1 mF. The

bootstrap capacitor is located between the PH pins and BOOT pin. The bootstrap capacitor should be a

high-quality ceramic type with X7R or X5R grade dielectric for temperature stability.

CATCH DIODE

The TPS54331 is designed to operate using an external catch diode between PH and GND. The selected diode

must meet the absolute maximum ratings for the application: Reverse voltage must be higher than the maximum

voltage at the PH pin, which is VINMAX + 0.5 V. Peak current must be greater than IOUTMAX plus on half the

peak to peak inductor current. Forward voltage drop should be small for higher efficiencies. It is important to note

that the catch diode conduction time is typically longer than the high-side FET on time, so attention paid to diode

parameters can make a marked improvement in overall efficiency. Additionally, check that the device chosen is

capable of dissipating the power losses. For this design, a Diodes, Inc. B340A is chosen, with a reverse voltage

of 40 V, forward current of 3 A, and a forward voltage drop of 0.5 V.

16

Submit Documentation Feedback

Copyright © 2010, Texas Instruments Incorporated

Product Folder Link(s): TPS54331-Q1