(

)

( )

( )

(

)

SS

ref

SS

SS

C

nF

V

V

T

ms

=

I

A

´

m

TPS54331-Q1

www.ti.com

SLVSAB5 – NOVEMBER 2010

internally. The TPS54331 effectively uses the lower voltage of the internal voltage reference or the SS pin

voltage as the power supply’s reference voltage fed into the error amplifier and will regulate the output

accordingly. A capacitor (CSS) on the SS pin to ground implements a slow start time. The TPS54331 has an

internal pull-up current source of 2mA that charges the external slow start capacitor. The equation for the slow

start time (10% to 90%) is shown in Equation 3 . The Vref is 0.8 V and the ISS current is 2 mA.

(3)

The slow start time should be set between 1ms to 10 ms to ensure good start-up behavior. The slow start

capacitor should be no more than 27nF.

If during normal operation, the input voltage drops below the VIN UVLO threshold, or the EN pin is pulled below

1.25 V, or a thermal shutdown event occurs, the TPS54331 stops switching.

ERROR AMPLIFIER

The TPS54331 has a transconductance amplifier for the error amplifier. The error amplifier compares the

VSENSE voltage to the internal effective voltage reference presented at the input of the error amplifier. The

transconductance of the error amplifier is 92 mA/V during normal operation. Frequency compensation

components are connected between the COMP pin and ground.

SLOPE COMPENSATION

In order to prevent the sub-harmonic oscillations when operating the device at duty cycles greater than 50%, the

TPS54331 adds a built-in slope compensation which is a compensating ramp to the switch current signal.

CURRENT MODE COMPENSATION DESIGN

To simplify design efforts using the TPS54331, the typical designs for common applications are listed in Table 1.

For designs using ceramic output capacitors, proper derating of ceramic output capacitance is recommended

when doing the stability analysis. This is because the actual ceramic capacitance drops considerably from the

nominal value when the applied voltage increases. Advanced users may refer to the Step by Step Design

Procedure in the Application Information section for the detailed guidelines or use SwitcherPro™ Software tool

(http://focus.ti.com/docs/toolsw/folders/print/switcherpro.html).

Table 1. Typical Designs (Referring to Simplified Schematic on page 1)

VIN

VOUT

Fsw

Lo

Co

RO1

RO2

C2

C1

R3

(V)

(V)

(kHz)

(mH)

(k

Ω)

(k

Ω)

(pF)

(pF)

(k

Ω)

12

5

570

6.8

Ceramic 33 mFx2

10

1.91

39

4700

49.9

12

3.3

570

6.8

Ceramic 47mFx2

10

3.24

47

1000

29.4

12

1.8

570

4.7

Ceramic 100 mF

10

8.06

68

5600

29.4

12

0.9

570

3.3

Ceramic 100 mFx2

10

80.6

56

5600

29.4

12

5

570

6.8

Aluminum 330 mF/160 mΩ

10

1.91

68

120

29.4

12

3.3

570

6.8

Aluminum 470 mF/160 mΩ

10

3.24

82

220

10

12

1.8

570

4.7

SP 100 mF/15 mΩ

10

8.06

68

5600

29.4

12

0.9

570

3.3

SP 330 mF/12 mΩ

10

80.6

100

1200

49.9

OVERCURRENT PROTECTION AND FREQUENCY SHIFT

The TPS54331 implements current mode control that uses the COMP pin voltage to turn off the high-side

MOSFET on a cycle by cycle basis. Every cycle the switch current and the COMP pin voltage are compared;

when the peak inductor current intersects the COMP pin voltage, the high-side switch is turned off. During

overcurrent conditions that pull the output voltage low, the error amplifier responds by driving the COMP pin high,

causing the switch current to increase. The COMP pin has a maximum clamp internally, which limit the output

current.

Copyright © 2010, Texas Instruments Incorporated

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