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DIX4192 Datasheet(PDF) 60 Page - Texas Instruments

Part # DIX4192
Description  DIX4192-Q1 Integrated Digital Audio Interface Receiver and Transmitter
PDF  70 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

DIX4192 Datasheet(HTML) 60 Page - Texas Instruments

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10 F
0.1 F
Top Layer Ground Pour and PowerPad
Top Layer Signal Traces
Pad to top layer ground pour
It is recommended to place a top layer ground pour for shielding around PCM9211 and
connect to lower main PCB ground plane by multiple vias
Series resistors between
50
and 100 Ÿ
on PCM ports can reduce
reflections if necessary
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1.8 V
0.1 F
10 µF
VIO
3.3 V
0.1 F
10 F
0.1 F
SYNC
BLS
AESOUT
VDD33
TX+
TX±
DGND2
GPO4
GPO3
GPO2
GPO1
MCLK
RX1+
RX1±
RX2+
RX2±
RX3+
RX3±
RX4+
RX4±
VCC
AGND
LOCK
RXCKO
Port B PCM
Input and Output
Differential
Line Inputs
Control Interface
GPO to
Host
10 F
3.3 V
Port A PCM
Input and Output
VIO
INT pin must be pulled up to VIO
through 10-NŸ UHVLVWRU
10 NŸ
DIX4192-Q1
Copyright © 2017, Texas Instruments Incorporated
60
DIX4192-Q1
SBFS041A – JULY 2016 – REVISED APRIL 2017
www.ti.com
Product Folder Links: DIX4192-Q1
Submit Documentation Feedback
Copyright © 2016–2017, Texas Instruments Incorporated
12 Layout
12.1 Layout Guidelines
TI recommends to use one ground plane for the DIX4192-Q1. While using one ground plane, it is best to ensure
that analog and digital circuitry be sufficiently partitioned on the PCB so that analog and digital return currents do
not cross.
•
Decoupling capacitors must be placed as close to power pins as possible (VCC, VDD33, VDD18, VIO).
•
Further guidelines can be found in Layout Example.
12.2 Layout Example
Figure 85. DIX4192-Q1 Board Layout



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