5 Pin Configuration and Functions

1

REF

8

VCC

2

RESIN

7

SENSE

3

CT

6

RESET

4

GND

5

RESET

Not to scale

Figure 5-1. D or P Package 8-Pin SOIC or PDIP Top View

Pin Functions

PIN

I/O

DESCRIPTION

NAME

NO.

CT

3

O

Timing capacitor input. The timing capacitor determines the time delay that the reset outputs remain

active after the voltage at the SENSE input exceeds the positive-going threshold value.

GND

4

—

Ground

REF

1

O

Reference voltage. See Section 6.5 for reference voltage output and specification.

RESET

6

O

Active high reset. See Figure 6-1 for RESET function and timing.

RESET

5

O

Active low reset. See Figure 6-1 for RESET function and timing.

RESIN

2

I

Reset input. When the Reset Input is low, the RESET output goes high and the RESET goes low. When

the Reset Input is high, the RESET and RESET outputs are allowed to trigger based on the SENSE

voltage.

SENSE

7

I

Sense input. Voltage input to be supervised. See Figure 6-1 for SENSE function and timing.

VCC

8

—

Supply voltage. See Section 6.3 for recommended voltage input range.

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TL7702B, TL7705B, TL7733B

SLVS037O – SEPTEMBER 1989 – REVISED DECEMBER 2020

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