6.9 Electrical Characteristics

over recommended operating conditions, unless otherwise noted

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

SIDE 1 (ONLY)

VILT1

Voltage input threshold low, SDA1

and SCL1

480

550

660

mV

VIHT1

Voltage input threshold high, SDA1

and SCL1

520

610

700

mV

VHYST1 Voltage input hysteresis

VIHT1 –VILT1

40

60

mV

VOL1

Low-level output voltage, SDA1 and

SCL1(1)

0.5 mA ≤ (ISDA1 and ISCL1) ≤ 3.5 mA

570

800

mV

ΔVOIT1

Low-level output voltage to high-

level input voltage threshold

difference, SDA1 and SCL1(1) (2)

0.5 mA ≤ (ISDA1 and ISCL1) ≤ 3.5 mA

50

mV

SIDE 2 (ONLY)

VILT2

Voltage input threshold low, SDA2

and SCL2

0.3 × VCC2

0.4 × VCC2

V

VIHT2

Voltage input threshold high, SDA2

and SCL2

0.4 × VCC2

0.5 × VCC2

V

VHYST2 Voltage input hysteresis

VIHT2 – VILT2

0.05 × VCC2

V

VOL2

Low-level output voltage, SDA2 and

SCL2

0.5 mA ≤ (ISDA2 and ISCL2) ≤ 35 mA

0.4

V

BOTH SIDES

|II|

Input leakage currents, SDA1,

SCL1, SDA2, and SCL2

VSDA1, VSCL1 = VCC1;

VSDA2, VSCL2 = VCC2

0.01

10

µA

CI

Input capacitance to local ground,

SDA1, SCL1, SDA2, and SCL2

VI = 0.4 × sin(2E6πt) + 2.5 V

7

pF

CMTI

Common-mode transient immunity

See Figure 7-3

25

50

kV/µs

VCCUV

VCC undervoltage lockout

threshold(3)

1.7

2.5

2.9

V

(1)

This parameter does not apply to the ISO1541 SCL1 line as it is unidirectional.

(2)

∆VOIT1 = VOL1 – VIHT1. This represents the minimum difference between a Low-Level Output Voltage and a High-Level Input Voltage

Threshold to prevent a permanent latch condition that would otherwise exist with bidirectional communication.

(3)

Any VCC voltages, on either side, less than the minimum will ensure device lockout. Both VCC voltages greater than the maximum will

prevent device lockout.

ISO1540, ISO1541

SLLSEB6F – JULY 2012 – REVISED DECEMBER 2022

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