VCC

8V - 15V (from

external source)

LM5032

GND1

GND2

C1

VIN

V

PWR

tVCC =

C1 x 7.6V

ICC(Lim)

LM5032

SNVS344B – MARCH 2005 – REVISED DECEMBER 2014

www.ti.com

Application Information (continued)

8.1.4 VCC

The capacitor at VCC provides not only regulator noise filtering and stability, but also prevents VCC from

dropping to the lower under-voltage threshold level (UVT = 6.2V) when the output drivers source current surges

to the external MOSFET gates. Additionally, the capacitor provides a necessary time delay during startup. The

time delay allows the internal circuitry of the LM5032 and associated external circuitry to stabilize before VCC

reaches the upper UVT threshold level (7.6V), at which time the outputs are enabled and the soft-start sequence

begins. VCC is nominally regulated at 7.7V. The delay to the UVT level (Figure 1) is calculated from the

following:

(5)

where C1 is the capacitor at VCC and ICC(Lim) is the VCC regulator’s current limit. If the capacitor is 0.1 µF, the

nominal ICC(Lim) of 22 mA provides a delay of approximately 35 µs. The capacitor value should range between 0.1

µF and 25 µF. Experimentation with the final design may be necessary to determine the optimum value for the

VCC capacitor.

The average VCC regulator current required to drive the external MOSFETs is a function of the MOSFET gate

capacitance and the switching frequency (see Figure 4). To ensure VCC does not droop below the lower UVT

threshold, an external supply should be diode connected to VCC to provide the required current, as shown in

Figure 24. The applied VCC voltage must be between 8V and 15V. Providing the VCC voltage higher than the

7.7V regulation level with an external supply shuts off the internal regulator, reducing power dissipation within the

IC. Internally there is a diode from the VCC regulator output to VIN. Typically the applied voltage is derived from

an auxiliary winding on the power transformer, or on the output inductor.

Figure 24. External Power to VCC

8.1.5 Oscillator, Sync Input

The oscillator frequency is generally selected in conjunction with the system magnetic components, and any

other aspects of the system which may be affected by the frequency. The RT resistor at the RT/SYNC pin sets

the frequency according to Equation 1. Each output (OUT1 and OUT2) switches at one-half the oscillator

frequency. If the required frequency tolerance is critical in a particular application, the tolerance of the external

resistor and the frequency tolerance specified in the Electrical Characteristics table must be considered when

selecting the RT resistor.

If the LM5032 is to be synchronized to an external clock, that signal must be coupled into the RT/SYNC pin

through a 100 pF capacitor. The external synchronizing frequency must be at least 4% higher than the free

running frequency set by the RT resistor and no higher than twice the free running frequency. The RT/SYNC pin

voltage is nominally regulated at 2.0V and the external pulse amplitude should lift the pin to between 3.8V and

5.0V on the low-to-high transition. The synchronization pulse width should be between 15 and 150 ns. The RT

resistor is always required, whether the oscillator is free running or externally synchronized.

8.1.6 Voltage Feedback, COMP1, COMP2

Each COMP pin is designed to accept a voltage feedback signal from the respective regulated output via an

error amplifier and (typically) an opto-coupler. A typical configuration is shown in Figure 15. VOUT is compared to

a reference by the error amplifier which has an appropriate frequency compensation network. The amplifier’s

output drives the opto-coupler, which in turn drives the COMP pin.

20

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