ADV7182ABCPZ datasheet(65/102 Pages) AD

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Data Sheet

ADV7182A

0 | Page 65 of 102

The MPU can write to or read from all of the ADV7182A registers

except the subaddress register, which is write only. The subaddress

accesses. All communications with the device through the bus

start with an access to the subaddress register. A read/write

operation is then performed from or to the target address, which

increments to the next address until a stop command on the bus

is performed. Note that only the registers listed in the I2C Register

Maps section are supported.

The following sections describe the configuration for each

write operation is selected, the subaddress is set up. The sub-

address register determines to or from which register the

operation takes place.

SUB_USR_EN—Address 0x0E, Bits[6:5]

The ADV7182A has three I2C maps. The main register map (see

Table 93) is the map that is available by default. The other two

maps are accessed using the SUB_USR_EN bit (Address 0x0E).

When programming of these maps is completed, it is necessary

to write to the SUB_USR_EN bit to return to the main register

map (see Table 93).

Figure 48. Register Access—Main Register Map, Interrupt/VDP Map, and User

Sub Map 2

These bits are set up to point to the required starting address.

I2C SEQUENCER

An I2C sequencer is used when a parameter exceeds eight bits

and is, therefore, distributed over two or more I2C registers, for

example, HSB[10:0].

When such a parameter is changed using two or more I2C write

operations, the parameter can hold an invalid value for the time

between the first I2C being completed and the last I2C being

completed. In other words, the top bits of the parameter may

hold the new value while the remaining bits of the parameter still

hold the previous value.

To avoid this problem, the I2C sequencer holds the updated bits

of the parameter in local memory, and all bits of the parameter

are updated together once the last register write operation has

completed.

The correct operation of the I2C sequencer relies on the

following conditions:



All I2C registers for the parameter in question must be

written to in order of ascending addresses. For example, for

HSB[10:0], write to Address 0x34 first, followed by 0x35,

and so on.



No other I2C can take place between the two (or more) I2C

writes for the sequence. For example, for HSB[10:0], write to

Address 0x34 first, immediately followed by 0x35, and so on.

BITS[6:5] = 00b

MAIN REGISTER

MAP

BITS[6:5] = 01b

INTERRUPT/VDP

MAP

BITS[6:5] = 10b

USER SUB MAP

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