ADV7182ABCPZ datasheet(24/102 Pages) AD

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ADV7182A

Data Sheet

Rev. 0 | Page 24 of 102

AD_SECAM_EN, SECAM Autodetect Enable—

Address 0x07, Bit 6

Setting AD_SECAM_EN to 0 (default) disables the autodetection

of SECAM. Setting AD_SECAM_EN to 1 enables the detection

of SECAM.

AD_N443_EN, NTSC 4.43 Autodetect Enable—

Address 0x07, Bit 5

Setting AD_N443_EN to 0 disables the autodetection of NTSC

style systems with a 4.43 MHz color subcarrier. Setting

AD_N443_EN to 1 (default) enables the detection of NTSC

style systems with a 4.43 MHz color subcarrier.

AD_P60_EN, PAL 60 Autodetect Enable—Address 0x07,

Bit 4

Setting AD_P60_EN to 0 disables the autodetection of PAL

systems with a 60 Hz field rate. Setting AD_P60_EN to 1

(default) enables the detection of PAL systems with a 60 Hz

field rate.

AD_PALN_EN, PAL N Autodetect Enable—Address 0x07,

Bit 3

Setting AD_PALN_EN to 0 (default) disables the detection of

the PAL N standard. Setting AD_PALN_EN to 1 enables the

detection of the PAL N standard.

AD_PALM_EN, PAL M Autodetect Enable—

Address 0x07, Bit 2

Setting AD_PALM_EN to 0 (default) disables the autodetection

of PAL M. Setting AD_PALM_EN to 1 enables the detection of

PAL M.

AD_NTSC_EN, NTSC Autodetect Enable—Address 0x07,

Bit 1

Setting AD_NTSC_EN to 0 (default) disables the detection of

standard NTSC. Setting AD_NTSC_EN to 1 enables the

detection of standard NTSC.

AD_PAL_EN, PAL B/PAL D/PAL I/PAL G/PAL H

Autodetect Enable—Address 0x07, Bit 0

Setting AD_PAL_EN to 0 (default) disables the detection of

standard PAL. Setting AD_PAL_EN to 1 enables the detection of

standard PAL.

SFL_INV, Subcarrier Frequency Lock Inversion—

Address 0x41, Bit 6

This bit controls the behavior of the PAL switch bit in the

SFL (genlock telegram) data stream. This control solves some

compatibility issues with video encoders, as well as solving two

problems.

First, the PAL switch bit is meaningful only in PAL. Some encoders

(including Analog Devices encoders) also look at the state of

this bit in NTSC.

The second problem is to accommodate a design change using

newer Analog Devices encoders, such as the ADV7340,

ADV7341, ADV7342, ADV7343, ADV7344, ADV7390,

ADV7391, ADV7392, ADV7393, ADV7171, ADV7172,

ADV7173, ADV7174, ADV7177, and ADV7179. The older

encoders used the SFL (genlock telegram) bit directly, whereas

the newer encoders invert the bit prior to using because the

inversion compensates for the one line delay of an SFL (genlock

telegram) transmission.

As a result, for the newer video encoders (ADV7340, ADV7341,

ADV7342, ADV7343, ADV7344, ADV7390, ADV7391,

ADV7392, ADV7393, ADV7171, ADV7172, ADV7173,

ADV7174, ADV7177, and ADV7179), the PAL switch bit in the

SFL (genlock telegram) must be set to 0 for NTSC to work. For the

older video encoders, the PAL switch bit in the SFL must be set

to 1 to work in NTSC. If the state of the PAL switch bit is

wrong, a 180° phase shift occurs.

In a decoder/encoder back to back system in which SFL is used,

this bit must be set up properly for the specific encoder used.

Setting SFL_INV to 0 (default) makes the device SFL compatible

with newer video encoders such as the ADV7340, ADV7341,

ADV7342, ADV7343, ADV7344, ADV7390, ADV7391,

ADV7392, ADV7393, ADV7171, ADV7172, ADV7173,

ADV7174, ADV7177, and ADV7179.

Setting SFL_INV to 1 makes the device SFL compatible with the

older video encoders.

Lock Related Controls

Lock information is presented to the user through Bits[2:0] of the

Status 1 register (see the Status 1[7:0]—Address 0x10, Bits[7:0]

section). Figure 13 shows the signal flow and the controls available

to influence the way the lock status information is generated.

ADV7182ABCPZ Datasheet(PDF) 24 Page - Analog Devices

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