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ADS54J20 Datasheet(PDF) 36 Page - Texas Instruments |
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ADS54J20 Datasheet(HTML) 36 Page - Texas Instruments |
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36 / 117 page  8.4 Device Functional Modes 8.4.1 Power-Down Mode The ADS54J40 provides a highly-configurable power-down mode. Power-down can be enabled using the PDN pin or SPI register writes. A power-down mask can be configured that allows a trade-off between wake-up time and power consumption in power-down mode. Two independent power-down masks can be configured: MASK 1 and MASK 2, as shown in Table 8-6. See the master page registers in Register Maps for further details. Table 8-6. Register Address for Power-Down Modes REGISTER ADDRESS COMMENT REGISTER DATA A[7:0] (Hex) 7 6 5 4 3 2 1 0 MASTER PAGE (80h) 20 MASK 1 PDN ADC CHA PDN ADC CHB 21 PDN BUFFER CHB PDN BUFFER CHA 0 0 0 0 23 MASK 2 PDN ADC CHA PDN ADC CHB 24 PDN BUFFER CHB PDN BUFFER CHA 0 0 0 0 26 CONFIG GLOBAL PDN OVERRIDE PDN PIN PDN MASK SEL 0 0 0 0 0 55 0 0 0 PDN MASK 0 0 0 0 To save power, the device can be put in complete power-down by using the GLOBAL PDN register bit. However, when JESD must remain linked up when putting the device in power-down, the ADC and analog buffer can be powered down by using the PDN ADC CHx and PDN BUFFER CHx register bits after enabling the PDN MASK register bit. The PDN MASK SEL register bit can be used to select between MASK 1 or MASK 2. Table 8-7 shows power consumption for different combinations of the GLOBAL PDN, PDN ADC CHx, and PDN BUFF CHx register bits. Table 8-7. Power Consumption in Different Power-Down Settings REGISTER BIT COMMENT IAVDD3V (mA) IAVDD (mA) IDVDD (mA) IIOVDD (mA) TOTAL POWER (W) Default After reset, with a full-scale input signal to both channels 336 358 198 533 2.68 GBL PDN = 1 The device is in complete power-down state 2 6 22 199 0.29 GBL PDN = 0, PDN ADC CHx = 1 (x = A or B) The ADC of one channel is powered down 274 223 135 512 2.09 GBL PDN = 0, PDN BUFF CHx = 1 (x = A or B) The input buffer of one channel is powered down 262 352 194 545 2.45 GBL PDN = 0, PDN ADC CHx = 1, PDN BUFF CHx = 1 (x = A or B) The ADC and input buffer of one channel is powered down 198 222 132 508 1.85 GBL PDN = 0, PDN ADC CHx = 1, PDN BUFF CHx = 1 (x = A and B) The ADC and input buffer of both channels are powered down 60 85 66 484 1.02 ADS54J40 SBAS714C – MAY 2015 – REVISED DECEMBER 2020 www.ti.com 36 Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated Product Folder Links: ADS54J40 |
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