ADS54J20 datasheet(56/117 Pages) TI2

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8.5.2.2.2 Register 21h (address = 21h), Master Page (080h)

Figure 8-30. Register 21h

PDN BUFFER CHB

PDN BUFFER CHA

R/W-0h

W-0h

Table 8-28. Register 21h Field Descriptions

Bit

Field

Type

Reset

Description

7-6

PDN BUFFER CHB

R/W

There are two power-down masks that are controlled through

the PDN mask register bit in address 55h. The power-down

mask 1 or mask 2 are selected via register address 26h, bit 5.

Power-down mask 1: addresses 20h and 21h.

Power-down mask 2: addresses 23h and 24h.

There are two buffers per channel. One buffer drives two ADC

cores.

PDN BUFFER CHx:

00 = Both buffers of a channel are active.

11 = Both buffers are powered down.

01–10 = Do not use.

5-4

PDN BUFFER CHA

R/W

3-0

Must write 0.

8.5.2.2.3 Register 23h (address = 23h), Master Page (080h)

Figure 8-31. Register 23h

PDN ADC CHA

PDN ADC CHB

R/W-0h

Table 8-29. Register 23h Field Descriptions

Bit

Field

Type

Reset

Description

7-4

PDN ADC CHA

R/W

There are two power-down masks that are controlled through

the PDN mask register bit in address 55h. The power-down

mask 1 or mask 2 are selected via register address 26h, bit 5.

Power-down mask 1: addresses 20h and 21h.

Power-down mask 2: addresses 23h and 24h.

0Fh = Power-down CHB only.

F0h = Power-down CHA only.

FFh = Power-down both.

3-0

PDN ADC CHB

R/W

ADS54J40

SBAS714C – MAY 2015 – REVISED DECEMBER 2020

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