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ADS54J20 Datasheet(PDF) 76 Page - Texas Instruments |
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ADS54J20 Datasheet(HTML) 76 Page - Texas Instruments |
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76 / 117 page ![]() 8.5.2.6 JESD Analog Page (6A00h) Registers 8.5.2.6.1 Register 12h (address = 12h), JESD Analog Page (6A00h) TBD I separated this register since it is now different from the rest Figure 8-58. Register 12h 7 6 5 4 3 2 1 0 SEL EMP LANE 1 ALWAYS WRITE 1 0 R/W-0h W-0h W-0h Table 8-72. Register 12h Field Descriptions Bit Field Type Reset Description 7-2 SEL EMP LANE 1, 0, 2, or 3 R/W 0h These bits select the amount of de-emphasis for the JESD output transmitter. The de-emphasis value in dB is measured as the ratio between the peak value after the signal transition to the settled value of the voltage in one bit period. 000000 = 0 dB 000001 = –1 dB 000011 = –2 dB 000111 = –4.1 dB 001111 = –6.2 dB 011111 = –8.2 dB 111111 = –11.5 dB 1 ALWAYS WRITE 1 W 0h 1 = Always write 1 0 0 W 0h 0 = Must write 0 ADS54J40 SBAS714C – MAY 2015 – REVISED DECEMBER 2020 www.ti.com 76 Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated Product Folder Links: ADS54J40 |
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