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INA3221 Datasheet(PDF) 23 Page - Texas Instruments

Part # INA3221
Description  INA3221 26V, Triple Channel, 13-Bit, I2C Output Current and Voltage Monitor With Alerts
PDF  50 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

INA3221 Datasheet(HTML) 23 Page - Texas Instruments

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SCL
SDA
t(LOW)
tr
tfCL
t(HDSTA)
t(HDSTA)
t(HDDAT)
t(HIGH)
t(SUSTA)
t(BUF)
S
S
P
P
t(VDDAT)
t(SUSTO)
t(SUDAT)
tfDA
Figure 7-13. Bus Timing
Table 7-2. Bus Timing Definitions (1)
PARAMETER
FAST MODE
HIGH-SPEED MODE
UNIT
MIN
MAX
MIN
MAX
f(SCL)
SCL operating frequency
0.001
0.4
0.001
2.44
MHz
t(BUF)
Bus free time between stop and start conditions
1300
160
ns
t(HDSTA)
Hold time after repeated START condition.
After this period, the first clock is generated.
600
160
ns
t(SUSTA)
Repeated start condition setup time
600
160
ns
t(SUSTO)
STOP condition setup time
600
160
ns
t(HDDAT)
Data hold time
0
0
ns
t(VDDAT)
Data valid time
1200
260
ns
t(SUDAT)
Data setup time
100
10
ns
t(LOW)
SCL clock low period
1300
270
ns
t(HIGH)
SCL clock high period
600
60
ns
tfDA
Data fall time
500
150
ns
tfCL
Clock fall time
300
40
ns
tr
Clock rise time
300
40
ns
Clock rise time for SCLK ≤ 100kHz
1000
ns
(1)
Values based on a statistical analysis of a one-time sample of devices. Minimum and maximum values are not production tested.
A0 = A1 = 0.
7.5.3 SMBus Alert Response
The INA3221 responds to the SMBus alert response address. The SMBus alert response provides a quick fault
identification for simple target devices. When an alert occurs, the controller broadcasts the alert response target
address (0001 100) with the R/ W bit set high. Following this alert response, any target devices that generated
an alert self-identifies by acknowledging the alert response, and sending the respective address on the bus.
The alert response can activate several different target devices simultaneously, similar to the I2C general call. If
more than one target attempts to respond, bus arbitration rules apply. The losing device does not generate an
acknowledge, and continues to hold the alert line low until the interrupt is cleared. Alerts must be in Latch mode
to function.
www.ti.com
INA3221
SBOS576C – MAY 2012 – REVISED SEPTEMBER 2025
Copyright © 2025 Texas Instruments Incorporated
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Product Folder Links: INA3221



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