THS4541IRUNR.B datasheet(24/66 Pages) TI2

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NG is critically important for bandwidth and all output error terms (such as dc offset and noise). For lower-speed

devices, normally only the dc noise gain is considered. However, for the THS4541, with loop gain crossover at

greater than 300 MHz, the feedback network produces a parasitic pole to the differential summing junctions that

causes the noise gain to increase with frequency. This pole causes a lower than expected crossover frequency

added phase shift around the loop. Consider the feedback network (single-ended) of Figure 7-5, showing a

parasitic 0.2 pF on the feedback 402 Ω resistor. The 0.85 pF differential input capacitance of the THS4541 is

converted to single-ended as a 1.7 pF parasitic for this single-sided analysis circuit (the Rg shown is Rg2 in

Figure 7-1).

402

FDA

Output

200 fF

221

Vout

Cin

1.7 pF

Vin

Figure 7-5. Feedback Network for the Gain of 2 Configuration Using 402 Ω and Matching to a 50 Ω

Source

The response shape from Vout to Vin in Figure 7-5 has a pole and then a zero. To describe NG, invert the

Laplace transform of Vin and Vout from Figure 7-5 to provide the frequency-dependent NG response of Equation

1, where a zero comes in first and then a pole.

‡

Rf Cf

Cin

Rf Cf

(1)

The zero location is key. Using the gain of 2 values of Figure 7-5, the estimated zero in the NG is 588 MHz.

Limiting the parasitic capacitance at the summing junctions, either differentially or signal-ended, to a ground or

power plane is critical in board layouts.

Using this feedback model, and the open-loop gain and phase data for the THS4541, allows the Aol and NG

curves over frequency to be drawn, as shown in Figure 7-6, where the peaking in the noise gain pulls the

intersection point back in frequency.

Frequency (Hz)

10M

100M

D062

Aol Gain

Gain = 0.1

Gain = 1

Gain = 2

Figure 7-6. Aol and Noise Gain Plots for the Lower Gains of Figure 7-1

THS4541

SLOS375B – AUGUST 2014 – REVISED FEBRUARY 2024

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