THS4541IRUNR.B datasheet(10/66 Pages) TI2

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6.6 Electrical Characteristics: (Vs+) – Vs– = 3 V (continued)

at TA ≈ 25°C, Vocm = open (defaults midsupply), Vout = 2 VPP, Rf = 402 Ω, Rload = 499 Ω, 50-Ω input match, G = 2 V/V,

single-ended input, differential output, and PD = +Vs (unless otherwise noted); see Figure 7-1 for an ac-coupled gain of a

2-V/V test circuit, and Figure 7-3 for a dc-coupled gain of a 2-V/V test circuit

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

TEST

LEVEL(1)

POWER SUPPLY

Specified operating voltage

2.7

5.4

Quiescent operating current

TA = 25°C, Vs+ = 3 V

9.3

9.7

10.1

TA = –40°C to +125°C

9.7

10.6

±PSRR Power-supply rejection ratio

Either supply pin to differential Vout

100

POWER DOWN

Enable voltage threshold

(Vs–) + 1.7

Disable voltage threshold

(Vs–) + 0.7

Disable pin bias current

PD = Vs– → Vs+

Power-down quiescent current

PD = (Vs–) + 0.7 V

µA

PD = Vs–

1.0

8.0

Turn-on time delay

Time from PD = low to Vout = 90% of final value

100

Turn-off time delay

Time from PD = low to Vout = 10% of final value

OUTPUT COMMON-MODE VOLTAGE CONTROL(4)

Small-signal bandwidth

Vocm = 100 mVPP

140

MHz

Slew rate(2)

Vocm = 1-V step

350

V/µs

Gain

0.975

0.987

0.990

V/V

Input bias current

Considered positive out of node

–0.7

0.1

0.7

µA

Input impedance

Vocm input driven to ((Vs+) – Vs–) / 2

47 || 1.2

kΩ || pF

Default voltage offset from

((Vs+) – Vs–) / 2

Vocm pin open

–40

±10

CM Vos Common-mode offset voltage

Vocm input driven to

((Vs+) – Vs–) / 2

TA = 25°C

–5

±2

TA = 0°C to 70°C

–5.8

±2

5.8

TA = –40°C to +85°C

–6.2

±2

6.2

TA = –40°C to +125°C

–7

±2

Common-mode offset voltage drift(3)

Vocm input driven to ((Vs+) – Vs–) / 2

–20

±4

µV/°C

Common-mode loop supply

headroom to negative supply

< ±12-mV shift from

midsupply CM Vos

TA = 25°C

0.88

TA = 0°C to 70°C

0.91

TA = –40°C to +85°C

0.94

TA = –40°C to +125°C

0.94

Common-mode loop supply

headroom to positive supply

< ±12-mV shift from

midsupply CM Vos

TA = 25°C

1.1

TA = 0°C to 70°C

1.15

TA = –40°C to +85°C

1.2

TA = –40°C to +125°C

1.2

(1)

Test levels (all values set by characterization and simulation): (A) 100% tested at TA ≈ 25°C; over temperature limits by

characterization and simulation. (B) Not tested in production; limits set by characterization and simulation. (C) Typical value only

for information.

(2)

This slew rate is the average of the rising and falling time estimated from the large-signal bandwidth as: (VP / √ 2) · 2π · f–3dB.

(3)

Input offset voltage drift, input bias current drift, input offset current drift, and Vocm drift are average values calculated by taking

data at the at the maximum-range ambient-temperature end points, computing the difference, and dividing by the temperature range.

Maximum drift set by distribution of a large sampling of devices. Drift is not specified by test or QA sample test.

(4)

Specifications are from input Vocm pin to differential output average voltage.

THS4541

SLOS375B – AUGUST 2014 – REVISED FEBRUARY 2024

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