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ML22Q623 Datasheet(PDF) 17 Page - Rohm |
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ML22Q623 Datasheet(HTML) 17 Page - Rohm |
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17 / 118 page ![]() FEDL22Q62X-02 ML22Q62X ■ Function description ● Clock Synchronous Serial Interface The CSB, SCK, SI, and SO pins are used to input various command data and to read the status. For command and data inputting, after "L" level is input to the CSB pin, data is input to the SI pin in MSB first in synchronization with the input clock signal of the SCK pin. The SI pin data is loaded into the LSI in synchronization with the SCK pin clock, and the command data is determined by the SCK pin clock of the eighth pulse. When reading, after "L" level is input to the CSB pin, it is output from the SO pin in synchronization with the input clock signal of the SCK pin. The selection of the rising or falling edge of the SCK pin clock depends on the state of the SCK pin at the falling edge of the CSB pin. When the SCK pin is "H" at the falling edge of the CSB pin, the SI pin data is loaded into the LSI on the rising edge of the SCK pin clock, and the status signal is output from the SO pin on the falling edge of the SCK pin clock. When the SCK pin is "L" at the falling edge of the CSB pin, the SI pin data is loaded into the LSI on the falling edge of the SCK pin clock, and the status signal is output from the SO pin on the rising edge of the SCK pin clock. When the CSB pin is fixed to "L" level, the SI pin data is loaded into the LSI on the rising edge of the SCK pin clock, and the status signal is output from the SO pin at the falling edge of the SCK pin clock. However, if unexpected pulses are input to the SCK pin due to noise, etc., the count of the number of SCK pin clocks may be shifted, and normal command input may not be performed. The serial interface can be returned to the initial state by setting the CSB pin to "H" level. When the CSB pin is "H" level, the SO pin becomes a high impedance state. CSB SCK SI Command data input timing: SCK rising edge operation (When the SCK is "H" at the falling edge of the CSB) D7 D6 D5 D4 D3 D2 D1 D0 (MSB) (LSB) CSB SCK SI Command data input timing: SCK falling edge operation (When the SCK is "L" at the falling edge of the CSB) D7 D6 D5 D4 D3 D2 D1 D0 (MSB) (LSB) CSB SCK Command data output timing: SCK falling edge operation (When the SCK is "H" at the falling edge of the CSB) (MSB) (LSB) CSB SCK Command data output timing: SCK rising edge operation (When the SCK is "L" at the falling edge of the CSB) (MSB) (LSB) SO D7 D6 D5 D4 D3 D2 D1 D0 SO D7 D6 D5 D4 D3 D2 D1 D0 17/118 |
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