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TDA2SA Datasheet(PDF) 252 Page - Texas Instruments |
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TDA2SA Datasheet(HTML) 252 Page - Texas Instruments |
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252 / 427 page ![]() 252 TDA2SX, TDA2SG, TDA2SA TDA2HG, TDA2HV, TDA2HF, TDA2LF SPRS951F – DECEMBER 2015 – REVISED MAY 2019 www.ti.com Submit Documentation Feedback Product Folder Links: TDA2SX TDA2SG TDA2SA TDA2HG TDA2HV TDA2HF TDA2LF Timing Requirements and Switching Characteristics Copyright © 2015–2019, Texas Instruments Incorporated 7.13 Universal Asynchronous Receiver Transmitter (UART) The UART performs serial-to-parallel conversions on data received from a peripheral device and parallel- to-serial conversion on data received from the CPU. There are 10 UART modules in the device. Only one UART supports IrDA features. Each UART can be used for configuration and data exchange with a number of external peripheral devices or interprocessor communication between devices The UARTi (where i = 1 to 10) include the following features: • 16C750 compatibility • 64-byte FIFO buffer for receiver and 64-byte FIFO for transmitter • Baud generation based on programmable divisors N (where N = 1…16 384) operating from a fixed functional clock of 48 MHz or 192 MHz • Break character detection and generation • Configurable data format: – Data bit: 5, 6, 7, or 8 bits – Parity bit: Even, odd, none – Stop-bit: 1, 1.5, 2 bit(s) • Flow control: Hardware (RTS/CTS) or software (XON/XOFF) • Only UART1 module has extended modem control signals (CD, RI, DTR, DSR) • Only UART3 supports IrDA NOTE For more information, see the UART section of the Device TRM. Table 7-37, Table 7-38 and Figure 7-25 assume testing over the recommended operating conditions and electrical characteristic conditions below. Table 7-37. Timing Requirements for UART NO. PARAMETER DESCRIPTION MIN MAX UNIT 4 tw(RX) Pulse width, receive data bit, 15/30/100pF high or low 0.96U(1) 1.05U(1) ns 5 tw(CTS) Pulse width, receive start bit, 15/30/100pF high or low 0.96U(1) 1.05U(1) ns td(RTS-TX) Delay time, transmit start bit to transmit data P(2) ns td(CTS-TX) Delay time, receive start bit to transmit data P(2) ns (1) U = UART baud time = 1/programmed baud rate (2) P = Clock period of the reference clock (FCLK, usually 48 MHz or 192MHz). Table 7-38. Switching Characteristics Over Recommended Operating Conditions for UART NO. PARAMETER DESCRIPTION MIN MAX UNIT f(baud) Maximum programmable baud rate 15 pF 12 MHz 30 pF 0.23 100 pF 0.115 2 tw(TX) Pulse width, transmit data bit, 15/30/100 pF high or low U - 2(1) U + 2(1) ns 3 tw(RTS) Pulse width, transmit start bit, 15/30/100 pF high or low U - 2(1) U + 2(1) ns |
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