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TDA2SA Datasheet(PDF) 362 Page - Texas Instruments

Part # TDA2SA
Description  TDA2x ADAS Applications Processor 23mm Package (ABC Package) Silicon Revision 2.0
PDF  427 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

TDA2SA Datasheet(HTML) 362 Page - Texas Instruments

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Trace
3W
3W
W
U2
Ferrite Bead
VBUS
U1
USB Socket
5
4
3
2
1
6
SHIELD_GND
GND
DP
DM
+5 V
SHIELD_GND
Ferrite Bead
362
TDA2SX, TDA2SG, TDA2SA
TDA2HG, TDA2HV, TDA2HF, TDA2LF
SPRS951F – DECEMBER 2015 – REVISED MAY 2019
www.ti.com
Submit Documentation Feedback
Product Folder Links: TDA2SX TDA2SG TDA2SA TDA2HG TDA2HV TDA2HF TDA2LF
Applications, Implementation, and Layout
Copyright © 2015–2019, Texas Instruments Incorporated
Figure 8-32. USB Connector
8.5.2.2.2.5 Clock Routings
To address the system clock emissions between devices, place a ~10 to 130
Ω resistor in series with the
clock signal. Use a trial and error method of looking at the shape of the clock waveform on a high-speed
oscilloscope and of tuning the value of the resistance to minimize waveform distortion. The value on this
resistor should be as small as possible to get the desired effect. Place the resistor close to the device
generating the clock signal. If an external crystal is used, follow the guidelines detailed in the Selection
and Specification of Crystals for Texas Instruments USB 2.0 Devices (SLLA122).
When routing the clock traces from one device to another, try to use the 3W spacing rule. The distance
from the center of the clock trace to the center of any adjacent signal trace should be at least three times
the width of the clock trace. Many clocks, including slow frequency clocks, can have fast rise and fall
times. Using the 3W rule cuts down on crosstalk between traces. In general, leave space between each of
the traces running parallel between the devices. Avoid using right angles when routing traces to minimize
the routing distance and impedance discontinuities. For further protection from crosstalk, run guard traces
beside the clock signals (GND pin to GND pin), if possible. This lessens clock signal coupling, as shown in
Figure 8-33.
Figure 8-33. 3W Spacing Rule



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