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MP5611 Datasheet(PDF) 14 Page - Monolithic Power Systems |
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MP5611 Datasheet(HTML) 14 Page - Monolithic Power Systems |
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14 / 20 page ![]() MP5611 – 2.9V TO 5.2V INPUT, TRIPLE-OUTPUT, AMOLED POWER SUPPLY MP5611 Rev. 1.0 MonolithicPower.com 14 12/16/2021 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2021 MPS. All Rights Reserved. Diode Mode when VIN ≈ ELVDD When the input voltage (VIN) is close to ELVDD, the MP5611 operates in diode mode. In this mode, the ELVDD boost converter’s high-side MOSFET (HS-FET) is disabled, and its body diode operates as a rectifier to regulate VOUT. Note that the converter must work in continuous conduction mode (CCM) to achieve proper output regulation in diode mode. ELVDD Over-Current Protection (OCP) The MP5611 supports ELVDD over-current protection (OCP). If EVDD ’s output current (IOUT) exceeds 650mA (default) or the threshold configured via the CTRL signal, and lasts for 1ms, then OCP is triggered and the IC shuts down until CTRL or the power resets. AVDD OCP The MP5611 supports AVDD OCP. When AVDD ’s IOUT exceeds 210mA (default) or the threshold configured via the CTRL signal, and lasts for 1ms, then OCP is triggered and the IC shuts down until EN_AVDD or the power resets. Short Output Voltage (VOUT) Protection The MP5611 features complete short protection functions, including AVDD, ELVDD, ELVSS short to GND protection, as well as ELVDD short to LEVSS protection. The conditions required for the short protection functions follow: 1. If ELVDD does not reach its regulated voltage within 10ms after ELVDD is enabled (CTRL = high), all output voltages shut down (for ELVDD short to GND protection at start- up). 2. If ELVSS does not reach its regulated voltage within 12.5ms after ELVSS is enabled (22.5ms after CTRL = high), all output voltages shut down (for ELVSS short to GND protection at start-up). 3. If ELVSS > 250mV when ELVSS is enabled (10ms after CTRL = high), ELVDD and ELVSS shut down, and AVDD operates normally (for ELVDD short to ELVSS protection). 4. If AVDD decreases to 90% of its configured voltage for 1ms, all output voltages shut down (for AVDD short to GND protection during operation). 5. If ELVDD decreases to 80% of its configured voltage for 1ms, all output voltages shut down (for ELVDD short to GND protection during operation). 6. If ELVSS increases to >600mV for 1ms, all output voltages shut down (for ELVSS short to GND protection during operation). Thermal Shutdown To prevent the IC from operating at exceedingly high temperatures, thermal shutdown is implemented by monitoring the silicon die temperature. When the die temperature exceeds the upper threshold (TST), the IC shuts down. Once the die temperature drops below the lower threshold, the IC restarts and resumes normal operation. The hysteresis is 25°C. |
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