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AD4693 Datasheet(PDF) 39 Page - Analog Devices

Part # AD4693
Description  8-Channel, Easy Drive Multiplexed SAR ADC with Averaging Filters Per Channel
PDF  77 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD4693 Datasheet(HTML) 39 Page - Analog Devices

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Data Sheet
AD4693/AD4694
MODES OF OPERATION
analog.com
Rev. 0 | 39 of 77
AUTONOMOUS MODE
In autonomous mode, SPI commands are used to start and stop
autonomous ADC sampling. The internal oscillator functions as the
ADC sampling clock, and is enabled and disabled by writing to
the OSC_EN bit in the OSC_EN_REG register. Setting OSC_EN
to 1 enables the internal oscillator to run and trigger conversions
until OSC_EN is set back to 0. After each conversion, ADC results
are pushed to the averaging filter of the corresponding channel,
and the channel sequencer updates the multiplexer to the next
channel in the sequence. After disabling the internal oscillator, the
ADC results are read back via the averaging filter or accumulator
output registers as described in the Averaging Filter Readback
section. Table 20 shows the configuration bit settings for selecting
autonomous mode and the desired stop state source.
Figure 68 shows a typical connection diagram for the digital host
and AD4693/AD4694 digital interface in autonomous mode. The
CNV input state is don't care in autonomous mode. Figure 69
shows a timing diagram of the OSC_EN SPI writes, the internal
oscillator, and SPI readback timing in autonomous mode.
Prior to performing conversions in autonomous mode, the internal
oscillator frequency, channel sequencer, and averaging filter set-
tings must be configured as described in the Theory of Operation
section, followed by a state reset.
Figure 96 illustrates the step-by-step configuration flow for AD4693/
AD4694 in autonomous mode.
Figure 68. Autonomous Mode Example Connection Diagram
Figure 69. Autonomous Mode Timing Diagram



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