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ZIOL2201 Datasheet(PDF) 16 Page - Renesas Technology Corp

Part # ZIOL2201
Description  IO-Link Compliant HV Line Driver IC Family
PDF  92 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

ZIOL2201 Datasheet(HTML) 16 Page - Renesas Technology Corp

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ZIOL2xxx Datasheet
© 2016 Integrated Device Technology, Inc.
16
April 26, 2016
The (stripped down) IC versions ZIOL22xx/21xx contain only one channel. Figure 3.3 and Figure 3.4 show the
data path of the ZIOL22xx versions and ZIOL21xx versions, respectively. The following chapters regarding details
of the transmitter and receiver apply to IC versions with two channels (ZIOL24xx). The in the following described
functionality applies to IC versions with one channel (ZIOL22xx/21xx) correspondingly. With the implicit
understanding that one channel IC versions cannot perform tandem (master) mode operations or coordinated
transceiver operations no explicit statement in the following chapters will reflect this.
Figure 3.4
ZIOL21xx Transceiver Data Path in Principle
Device
Legend:
AF:
Analog Filter (on/off configurable)
CS:
Current Sink (on/off/strength configurable)
DF:
Digital Filter (on/off configurable)
I1, I2:
Transmit/Receive Data Inverter (on/off configurable)
L:
Data Latch, stores channel transmit status
SPI:
Serial Peripheral Interface
Analog Block
Digital Block
AUX
AUX_I
AUX_O
TX_EN/
SPI_CLK
TX/
MOSI
RX/
MISO
COM_O
COM_I
AUX_TX
AUX_EN
AUX_RX
AF
Single channel
transceiver
SPI
SPI_EN_L
DF
I2
CLK
I1
Device
DF
I2
I1
CS
ZIOL21xx Data Path
RST_L
INT_L
WURQ_L
Control
MOSI
MISO
L
L
Conf.Reg[7][7:5]
S0
S1
S2
S3
A
B
B
B
A
B
A
A
C
EN
TX
RX
OUT
IN
n.c.
n.c.
n.c.
n.c.
The master mode configuration flags MASTER_MODE, EN_FOLLOW_PRIM_CH and PRIMARY_MASTER_CH
located in the MASTER_SENS_CTRL configuration register (refer to Table 3.7) control the switches S0, S1, S2
and S3 (Figure 3.2, Figure 3.3 and Figure 3.4) thus they control the actually used data path. In principle, the
ZIOL2xxx IC family supports five data path types which are mentioned in Table 3.1. In case the MASTER_MODE
flag is cleared (=0), the IC operates in device mode. For more information about the operation in device/master
mode, please refer to chapter 3.2.2.1.



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