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LXT362 Datasheet(PDF) 1 Page - Intel Corporation |
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LXT362 Datasheet(HTML) 1 Page - Intel Corporation |
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1 / 48 page  LXT362 Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications Datasheet The LXT362 is a fully integrated, combination transceiver for T1 ISDN Primary Rate Interface and general T1 long and short haul applications. It operates over 22 AWG twisted-pair cables from 0 to 6 kft and offers Line Build Outs and pulse equalization settings for all T1 Line Interface Unit (LIU) applications. LXT362 provides both a serial port for microprocessor control (Host mode) as well as stand- alone operation (Hardware mode). The device incorporates advanced crystal-less digital jitter attenuation in either the transmit or receive data path starting at 3 Hz. B8ZS encoding/decoding and unipolar or bipolar data I/O are selectable. Loss of signal monitoring and a variety of diagnostic loopback modes can also be selected. Applications Product Features s ISDN Primary Rate Interface (ISDN PRI) s CSU/NTU interface to T1 Service s Wireless Base Station interface s T1 LAN/WAN bridge/routers s T1 Mux; Channel Banks s Digital Loop Carrier - Subscriber Carrier Systems s Fully integrated transceiver for Long or Short-Haul T1 interfaces — Crystal-less digital jitter attenuation — Select either transmit or receive path s No crystal or high speed external clock required s Meets or exceeds specifications in ANSI T1.102, T1.403 and T1.408; and AT&T Pub 62411 s Supports 100 Ω (T1 twisted-pair) applications s Selectable receiver sensitivity – fully restores the received signal after transmission through a cable with attenuation of either 0 to 26 dB, or 0 to 36 dB @ 772 kHz s Five Pulse Equalization Settings for T1 short-haul applications s Four Line Build-Outs for T1 long-haul applications from 0 dB to -22.5 dB s Transmit/receive performance monitors with Driver Fail Monitor Open and Loss of Signal outputs s Selectable unipolar or bipolar data I/O and B8ZS encoding/decoding s Line attenuation indication output in 2.9 dB steps s QRSS generator/detector for testing or monitoring s Local, remote, and analog loopback, plus in-band network loopback code generation and detection s Multiple register serial interface for microprocessor control s Available in 28-pin PLCC, 44-pin PQFP, and 44-pin LQFP packages As of January 15, 2001, this document replaces the Level One document Order Number: 249033-001 known as LXT362 — Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications. January 2001 |
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