RH850 datasheet(97/182 Pages) RENESAS

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Page 97 of 182

R01DS0494ED0100 Rev.1.00

June 16, 2025

RH850/U2A

Section 3 Electrical Characteristics

CAUTION

The states of I/O pins are not reset during the noise cancellation interval of the reset

signal following its assertion while power is being turned off. During that time, do not

allow any input of mid-range potential to the pin or contention of output data.

NOTE

DVCC, DVDD, ERAMVCC, ERAMVDD and EMUVDD are not included in the other power

voltages.

For power on/off timing about those power sources, see

Figure 3.18, EMUVCC, EMUVDD

Power On / Off Timings and Section 3.3.30, Debug Resource (Aurora, ERAM) Specific

Reset Timing.

Figure 3.13

Power On/Off Timings (Normal operating mode and User boot mode 0)

tPWH

tPLLL

tOSC

tTRMDH

tTRMDS

tTRSTH1

tRESH1

tMDH1

tMDS2

SYSVCC, VCC,

AD_VCC min

DRV_VCC min

EnVCC min

VDD min

Min operating voltage

for each power supply

SYSVCC, VCC,

SVRAVCC

SVRDRVCC

EnVCC

ISOVDD

MOSC

PLL

Other power

voltages

SYSVCC, VCC,

AD_VCC min

DRV_VCC min

EnVCC min

VDD min

Min operating voltage

for each power supply

RESET

FLMD0

TRST

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