EM78P342NP datasheet(65/102 Pages) EMC

65 / 102 page

EM78P341N/342N/343N

8-Bit Microprocessor with OTP ROM

Product Specification (V1.0) 12.01.2006

• 59

(This specification is subject to change without further notice)

CLRRE:

MOV A,RE

AND A, @0BXX0XXXXX

; To clear the ADIF bit, “X” by application

MOV RE,A

BS ADCON, ADRUN

; To start to execute the next AD conversion

if necessary

RETI

INITIAL:

MOV A,@0B00000001

; To define P50 as an analog input

MOV AISR,A

MOV A,@0B00001000

; To select P50 as an analog input channel, and

AD power on

MOV ADCON,A

; To define P50 as an input pin and set clock

rate at fosc/16

En_ADC:

MOV A, @0BXXXXXXX1

; To define P50 as an input pin, and the others

IOW PORT5

; are dependent on applications

MOV A, @0BXXXX1XXX

; Enable the ADWE wake-up function of ADC, “X”

by application

MOV RE,A

MOV A, @0BXXXX1XXX

; Enable the ADIE interrupt function of ADC,

“X” by application

IOW C_INT

ENI

; Enable the interrupt function

BS ADCON, ADRUN

; Start to run the ADC

; If the interrupt function is employed, the following three lines

may be ignored

;If Sleep:

SLEP

;

;(User program section)

;

;If Polling:

POLLING:

JBC ADCON, ADRUN

; To check the ADRUN bit continuously;

JMP POLLING

; ADRUN bit will be reset as the AD conversion

is completed

;

;(User program section)

;

EM78P342NP Datasheet(PDF) 65 Page - ELAN Microelectronics Corp

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