AD7152 datasheet(9/24 Pages) AD

9 / 24 page

AD7152/AD7153

Rev. 0 | Page 9 of 24

–0.3

–0.2

–0.1

0.1

0.2

0.3

100

150

200

250

300

350

CAP LOAD TO GND (pF)

Figure 12. Capacitance Input Error vs. Capacitance Between EXC and GND,

Differential Mode, CIN(+) to EXC = 8 pF,

CIN(−) to EXC = 6 pF, VDD = 3.3 V

–10

–8

–6

–4

–2

100

1000

RESISTANCE CIN TO GROUND (MΩ)

Figure 13. Capacitance Input Error vs. Parasitic Resistance CIN to GND,

Single-Ended Mode, CIN(+) to EXC = 9 pF, VDD = 3.3 V

–0.6

–0.4

–0.2

0.2

0.4

0.6

100

1000

RESISTANCE EXC TO GROUND (MΩ)

Figure 14. Capacitance Input Error vs. Parasitic Resistance EXC to GND,

Single-Ended Mode, CIN(+) to EXC = 9 pF, VDD = 3.3 V

–50

–40

–30

–20

–10

100

1000

PARALLEL RESISTANCE (MΩ)

Figure 15. Capacitance Input Error vs. Parasitic Parallel Resistance

Single-Ended Mode, CIN(+) to EXC = 9 pF, VDD = 3.3 V

–30

–25

–20

–15

–10

–5

2040

6080

SERIAL RESISTANCE (kΩ)

3pF

9pF

Figure 16. Capacitance Input Error vs. Serial Resistance,

Single-Ended Mode, CIN(+) to EXC = 3 pF and 9 pF, VDD = 3.3 V

–1.0

–0.8

–0.6

–0.4

–0.2

0.0

0.2

2.6

2.8

3.0

3.2

3.4

3.6

3.8

VDD (V)

Figure 17. Capacitance Input Power Supply Rejection (PSR),

Differential Mode; CIN(+) to EXC = 1.9 pF

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