M66596FP datasheet(36/131 Pages) RENESAS

36 / 131 page

M66596FP/WG

rev .1.00

2006.3.14

page 36 of 127

Interrupt status register 1[INTSTS1]

<Address: 42H>

BCHG

SOFR

DTCH

BEMP

NRDY

BRDY

SIGN

SACK

Bit

Name

Function

S/W

H/W

Note

15 Nothing is placed here. These should be fixed at “0”.

14 BCHG

USB bus change interrupt status

0: BCHG Interrupts not issued

1: BCHG Interrupts issued

R/W

3.2.11

13 SOFR

Frame number refresh interrupt status

This bit is a mirror bit of a 40H SOFR bit.

0: SOF Interrupts not issued

1: SOF Interrupts issued

R/W(0)

3.2.8

2.9.1

12 DTCH

Full-Speed detach detect interrupt status

0: DTCH Interrupts not issued

1: DTCH Interrupts issued

R/W

3.2.12

*4),*5)

11 Nothing is placed here. This should be fixed at “0”.

10 BEMP

Buffer Empty interrupt status

This bit is a mirror bit of a 40H BEMP bit.

0: BEMP interrupts not issued

1: BEMP interrupts issued

2.9.1

3.2.5

NRDY

Buffer Not Ready response interrupt

status

This bit is a mirror bit of a 40H NRDY bit.

0: NRDY interrupts not issued

1: NRDY interrupts issued

2.9.1

3.2.4

BRDY

Buffer Ready interrupt status

This bit is a mirror bit of a 40H BRDY bit.

0: BRDY interrupts not issued

1: BRDY interrupts issued

2.9.1

3.2.3

7-6 Nothing is placed here. This should be fixed at “0”.

SIGN

Setup transaction error detect interrupt

status

0: SIGN interrupts not issued

1: SIGN interrupts issued

R/W

3.2.14

*4)

SACK

Setup transaction complete interrupt

status

0: SACK interrupts not issued

1: SACK interrupts issued

R/W

3.2.13

*4)

3-0 Nothing is placed here. This should be fixed at “0”.

<<Notes>>

*4) DTCH, SIGN, SACK bit are effective only at the time of a Host mode.

*5) The DTCH bit is effective only at the time of Full-Speed mode.

Please perform detach detection by S/W, such as detecting ignore packet from peripheral device at the time of

Hi-Speed mode.

M66596FP Datasheet(PDF) 36 Page - Renesas Technology Corp

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