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SH7261 Datasheet(PDF) 340 Page - Renesas Technology Corp |
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SH7261 Datasheet(HTML) 340 Page - Renesas Technology Corp |
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340 / 1348 page ![]() Section 11 Direct Memory Access Controller (DMAC) Rev. 2.00 Sep. 07, 2007 Page 308 of 1312 REJ09B0320-0200 11.3 Register Descriptions The DMAC has the following registers. All registers are initialized by a power-on reset or in deep standby mode. Table 11.2 Register Configuration Channel Register Name Abbreviation R/W Initial Value Address Access Size 0 DMA current source address register 0 DMCSADR0 R/W Undefined H'FF460000 32 DMA current destination address register 0 DMCDADR0 R/W Undefined H'FF460004 32 DMA current byte count register 0 DMCBCT0 R/W Undefined H'FF460008 32 DMA mode register 0 DMMOD0 R/W Undefined H'FF46000C 32 DMA reload source address register 0 DMRSADR0 R/W Undefined H'FF460200 32 DMA reload destination address register 0 DMRDADR0 R/W Undefined H'FF460204 32 DMA reload byte count register 0 DMRBCT0 R/W Undefined H'FF460208 32 DMA control register A0 DMCNTA0 R/W H'00000000 H'FF460400 8, 16, 32 DMA control register B0 DMCNTB0 R/W H'00000000 H'FF460404 8, 16, 32 1 DMA current source address register 1 DMCSADR1 R/W Undefined H'FF460010 32 DMA current destination address register 1 DMCDADR1 R/W Undefined H'FF460014 32 DMA current byte count register 1 DMCBCT1 R/W Undefined H'FF460018 32 DMA mode register 1 DMMOD1 R/W Undefined H'FF46001C 32 DMA reload source address register 1 DMRSADR1 R/W Undefined H'FF460210 32 DMA reload destination address register 1 DMRDADR1 R/W Undefined H'FF460214 32 DMA reload byte count register 1 DMRBCT1 R/W Undefined H'FF460218 32 DMA control register A1 DMCNTA1 R/W H'00000000 H'FF460408 8, 16, 32 DMA control register B1 DMCNTB1 R/W H'00000000 H'FF46040C 8, 16, 32 |
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