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SH7261 Datasheet(PDF) 486 Page - Renesas Technology Corp |
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SH7261 Datasheet(HTML) 486 Page - Renesas Technology Corp |
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486 / 1348 page ![]() Section 12 Multi-Function Timer Pulse Unit 2 (MTU2) Rev. 2.00 Sep. 07, 2007 Page 454 of 1312 REJ09B0320-0200 12.3.28 Timer Interrupt Skipping Counter (TITCNT) TITCNT is an 8-bit readable/writable counter. The MTU2 has one TITCNT. TITCNT retains the value even after TCNT_3 or TCNT_4 stops counting. Bit: Initial value: R/W: 7654321 0 00000000 RRRRRRRR — 3ACNT[2:0] — 4VCNT[2:0] Bit Bit Name Initial Value R/W Description 7 — 0 R Reserved This bit is always read as 0. 6 to 4 3ACNT[2:0] 000 R TGIA_3 Interrupt Counter While the T3AEN bit in TITCR is set to 1, the count in these bits is incremented every time a TGIA_3 interrupt occurs. [Clearing conditions] • When the 3ACNT2 to 3ACNT0 value in TITCNT matches the 3ACOR2 to 3ACOR0 value in TITCR • When the T3AEN bit in TITCR is cleared to 0 • When the 3ACOR2 to 3ACOR0 bits in TITCR are cleared to 0 3 — 0 R Reserved This bit is always read as 0. 2 to 0 4VCNT[2:0] 000 R TCIV_4 Interrupt Counter While the T4VEN bit in TITCR is set to 1, the count in these bits is incremented every time a TCIV_4 interrupt occurs. [Clearing conditions] • When the 4VCNT2 to 4VCNT0 value in TITCNT matches the 4VCOR2 to 4VCOR2 value in TITCR • When the T4VEN bit in TITCR is cleared to 0 • When the 4VCOR2 to 4VCOR2 bits in TITCR are cleared to 0 Note: Clear the T3AEN and T4VEN bits in TITCR to 0, to clear the value of TITCNT. |
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