SH7261 datasheet(490/1348 Pages) RENESAS

Part #	SH7261

Description	32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

PDF	1348 Pages

Scroll/Zoom	100%

Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

Logo

490 / 1348 page

Section 12 Multi-Function Timer Pulse Unit 2 (MTU2)

Rev. 2.00 Sep. 07, 2007 Page 458 of 1312

REJ09B0320-0200

12.3.31

Timer Waveform Control Register (TWCR)

TWCR is an 8-bit readable/writable register that controls the waveform when synchronous counter

clearing occurs in TCNT_3 and TCNT_4 in complementary PWM mode and specifies whether to

clear the counters at TGRA_3 compare match. The CCE bit and WRE bit in TWCR must be

modified only while TCNT stops.

Bit:

Initial value:

R/W:

7654321

Note:

Do not set to 1 when complementary PWM mode is not selected.

0000000

R/(W)

CCE

——————

WRE

Bit

Bit Name

Initial

Value

R/W

Description

CCE

R/(W)

Compare Match Clear Enable

Specifies whether to clear counters at TGRA_3

compare match in complementary PWM mode.

0: Does not clear counters at TGRA_3 compare match

1: Clears counters at TGRA_3 compare match

[Setting condition]

• When 1 is written to CCE after reading CCE = 0

6 to 1

—

All 0

Reserved

These bits are always read as 0. The write value should

always be 0.

SH7261 Datasheet(PDF) 490 Page - Renesas Technology Corp

SH7261 Datasheet(HTML) 490 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL