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SH7261 Datasheet(PDF) 591 Page - Renesas Technology Corp

Part # SH7261
Description  32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series
PDF  1348 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7261 Datasheet(HTML) 591 Page - Renesas Technology Corp

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Section 12 Multi-Function Timer Pulse Unit 2 (MTU2)
Rev. 2.00 Sep. 07, 2007 Page 559 of 1312
REJ09B0320-0200
12.7.10
Contention between TGR Write and Input Capture
If an input capture signal is generated in the T2 state of a TGR write cycle, the input capture
operation takes precedence and the write to TGR is not performed for channels 0 to 4. For channel
5, write to TGR is performed and the input capture signal is generated.
Figures 12.116 and 12.117 show the timing in this case.
Input capture
signal
Write signal
Address
TCNT
TGR write cycle
T1
T2
M
TGR
M
TGR address
P
φ
Figure 12.116 Contention between TGR Write and Input Capture (Channels 0 to 4)
Input capture
signal
Write signal
Address
TCNT
TGR write cycle
T1
T2
N
TGR
M
TGR address
P
φ
TGR write data
Figure 12.117 Contention between TGR Write and Input Capture (Channel 5)



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