SH7261 datasheet(708/1348 Pages) RENESAS

708 / 1348 page

Section 16 Serial Communication Interface with FIFO (SCIF)

Rev. 2.00 Sep. 07, 2007 Page 676 of 1312

REJ09B0320-0200

16.3.3

Transmit Shift Register (SCTSR)

SCTSR transmits serial data. The SCIF loads transmit data from the transmit FIFO data register

(SCFTDR) into SCTSR, then transmits the data serially from the TxD pin, LSB (bit 0) first. After

transmitting one data byte, the SCIF automatically loads the next transmit data from SCFTDR into

SCTSR and starts transmitting again.

The CPU cannot read or write to SCTSR directly.

Bit:

Initial value:

R/W:

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16.3.4

Transmit FIFO Data Register (SCFTDR)

SCFTDR is a 16-byte FIFO register that stores data for serial transmission. When the SCIF detects

that the transmit shift register (SCTSR) is empty, it moves transmit data written in the SCFTDR

into SCTSR and starts serial transmission. Continuous serial transmission is performed until there

is no transmit data left in SCFTDR. The CPU can write to SCFTDR at all times.

When SCFTDR is full of transmit data (16 bytes), no more data can be written. If writing of new

data is attempted, the data is ignored.

SCFTDR is initialized to an undefined value by a power-on reset or in deep standby mode.

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Bit:

Initial value:

R/W:

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